openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-29 07:53:44 +02:00
Code Issues Releases Wiki Activity

Kill hardcoded block erase on ICH SPI

Browse Source 
The existing code does not work for all SPI chips, and it just was a
band-aid to cope with locked down chipsets back in a time when there was
no eraseblock infrastructure.
Basically, this unbreaks a few SPI chips on ICH.

Corresponding to flashrom svn r777.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
This commit is contained in:
Carl-Daniel Hailfinger 2009-11-25 02:07:30 +00:00
parent d5b28fae1d
commit 96123034f4
1 changed files with 7 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
ichspi.c
View File

@ -658,20 +658,16 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf)
int maxdata = 64; int maxdata = 64;
spi_disable_blockprotect(); spi_disable_blockprotect();
/* Erase first */
printf("Erasing flash before programming... ");
if (erase_flash(flash)) {
fprintf(stderr, "ERASE FAILED!\n");
return -1;
}
printf("done.\n");
printf("Programming page: \n"); printf("Programming page: \n");
for (i = 0; i < total_size / erase_size; i++) { for (i = 0; i < total_size / erase_size; i++) {
/* FIMXE: call the chip-specific spi_block_erase_XX instead.
* For this, we need to add a block erase function to
* struct flashchip.
*/
rc = spi_block_erase_d8(flash, i * erase_size, erase_size);
if (rc) {
printf("Error erasing block at 0x%x\n", i);
break;
}
if (spi_controller == SPI_CONTROLLER_VIA) if (spi_controller == SPI_CONTROLLER_VIA)
maxdata = 16; maxdata = 16;