openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 14:11:15 +02:00
Code Issues Releases Wiki Activity

Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode

Browse Source 
Change SPI architecture to handle 1-byte chunk chip writing differently
from 256-byte chunk chip writing.

Annotate SPI chip write functions with _256 or _1 suffix denoting the
number of bytes they write at maximum.

The 1-byte chunk writing is cut-n-pasted to different SPI drivers right
now. A later patch can move them to the generic spi_chip_write_1.

Corresponding to flashrom svn r485.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
Carl-Daniel Hailfinger
2009-05-09 02:30:21 +00:00
parent 03adbe1269
commit 96930c3952
6 changed files with 50 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
sb600spi.c
View File

@ -64,7 +64,7 @@ uint8_t sb600_read_status_register(void)
return readarr[0];
}
int sb600_spi_write(struct flashchip *flash, uint8_t *buf)
int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf)
{
int rc = 0, i;
int total_size = flash->total_size * 1024;