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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 23:43:42 +02:00

flashchips: Add missing block eraser for S25FL512S

Now that we can make use of the extended-address register, we can also
advertise the `d8` eraser that can take 3- or 4-byte addresses.

Signed-off-by: Nico Huber <nico.h@gmx.de>
Ticket: https://ticket.coreboot.org/issues/357
Change-Id: I8708294d42f5da80c0ca07ccdae627f13fd5c645
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64637
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
This commit is contained in:
Nico Huber 2022-05-24 15:33:26 +02:00
parent 62b020ac5f
commit 970f9481ae

View File

@ -16853,6 +16853,9 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { { 256 * 1024, 256} },
.block_erase = spi_block_erase_dc,
}, {
.eraseblocks = { { 256 * 1024, 256} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { { 65536 * 1024, 1} },
.block_erase = spi_block_erase_60,