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writeprotect_ranges.c: add more range functions
Not all chips follow the same pattern. There are differences in how CMP bit is treated or in block size used. Change-Id: Ied7b27be2ee2426af8f473432e2b01a290de2365 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66212 Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Anastasia Klimchuk

parent
125a328b4d
commit
994de3ae94
@ -216,5 +216,8 @@ int spi_block_erase_emulation(struct flashctx *flash, unsigned int addr, unsigne
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/* writeprotect_ranges.c */
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void decode_range_spi25(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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void decode_range_spi25_64k_block(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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void decode_range_spi25_bit_cmp(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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void decode_range_spi25_2x_block(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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#endif /* !__CHIPDRIVERS_H__ */
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@ -224,8 +224,11 @@ struct reg_bit_info {
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struct wp_bits;
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enum decode_range_func {
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NO_DECODE_RANGE_FUNC = 0, /* 0 indicates no range decode funciton is set. */
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NO_DECODE_RANGE_FUNC = 0, /* 0 indicates no range decode function is set. */
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DECODE_RANGE_SPI25 = 1,
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DECODE_RANGE_SPI25_64K_BLOCK = 2,
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DECODE_RANGE_SPI25_BIT_CMP = 3,
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DECODE_RANGE_SPI25_2X_BLOCK = 4,
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};
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typedef void (decode_range_func_t)(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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