openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00
Code Issues Releases Wiki Activity

Add generic 16 bit and 32 bit chip read/write emulation to the external flasher infrastructure

Browse Source 
The emulation works by splitting 32 bit accesses into 16 bit accesses
and 16 bit accesses into to 8 bit accesses. That way, external flashers
can mix and match the amount of emulation they need.

Corresponding to flashrom svn r517.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
2009-05-16 01:23:55 +00:00
parent 9862251f89
commit 9ee107721f
4 changed files with 39 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
nic3com.c
View File

@ -93,14 +93,6 @@ void nic3com_chip_writeb(uint8_t val, volatile void *addr)
OUTB(val, io_base_addr + BIOS_ROM_DATA);
}
void nic3com_chip_writew(uint16_t val, volatile void *addr)
{
}
void nic3com_chip_writel(uint32_t val, volatile void *addr)
{
}
uint8_t nic3com_chip_readb(const volatile void *addr)
{
uint8_t val;
@ -110,13 +102,3 @@ uint8_t nic3com_chip_readb(const volatile void *addr)
return val;
}
uint16_t nic3com_chip_readw(const volatile void *addr)
{
return 0xffff;
}
uint32_t nic3com_chip_readl(const volatile void *addr)
{
return 0xffffffff;
}