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spi25: Enable native 4BA read and write using feature bits
Prefer the native 4BA instruction when they are supported. In this case, override our logic to decide to use a 4BA address. Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22385 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9928,7 +9928,7 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
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.four_bytes_addr_funcs =
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{
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.read_nbyte = spi_nbyte_read_4ba_direct,
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@ -9967,7 +9967,7 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
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.four_bytes_addr_funcs =
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{
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.read_nbyte = spi_nbyte_read_4ba_direct,
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@ -14851,7 +14851,7 @@ const struct flashchip flashchips[] = {
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/* supports SFDP */
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/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
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/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ,
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.four_bytes_addr_funcs =
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{
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.set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */
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