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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

ichspi.c: Allow passing programmer_cfg directly

Modify the type signature of the programmer entry-point
xxx_init() functions to allow for the consumption of the
programmer parameterisation string data.
Also plumb programmer_cfg though get_params.

Change-Id: I480589bb50b47fdf5af259d068f49fedfce88ea5
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Edward O'Callaghan 2022-08-12 14:16:14 +10:00 committed by Anastasia Klimchuk
parent c9d8c422af
commit a20ceffa35
3 changed files with 10 additions and 10 deletions

View File

@ -816,7 +816,7 @@ static int enable_flash_ich_spi(const struct programmer_cfg *cfg, struct pci_dev
void *spibar = rcrb + spibar_offset;
/* This adds BUS_SPI */
int ret_spi = ich_init_spi(spibar, ich_generation);
int ret_spi = ich_init_spi(NULL, spibar, ich_generation); /* TODO(quasisec): pass prog_param */
if (ret_spi == ERROR_FATAL)
return ret_spi;
@ -960,7 +960,7 @@ static int enable_flash_pch100_or_c620(const struct programmer_cfg *cfg,
msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
/* This adds BUS_SPI */
const int ret_spi = ich_init_spi(spibar, pch_generation);
const int ret_spi = ich_init_spi(NULL, spibar, pch_generation); /* TODO(quasisec): pass prog_param */
if (ret_spi != ERROR_FATAL) {
if (ret_bc || ret_spi)
ret = ERROR_NONFATAL;
@ -1077,7 +1077,7 @@ static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_
*/
enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC);
int ret_spi = ich_init_spi(spibar, ich_generation);
int ret_spi = ich_init_spi(NULL, spibar, ich_generation); /* TODO(quasisec): pass prog_param */
if (ret_spi == ERROR_FATAL)
return ret_spi;

View File

@ -1872,9 +1872,9 @@ enum ich_spi_mode {
ich_swseq
};
static int get_ich_spi_mode_param(enum ich_spi_mode *ich_spi_mode)
static int get_ich_spi_mode_param(const struct programmer_cfg *cfg, enum ich_spi_mode *ich_spi_mode)
{
char *const arg = extract_programmer_param_str(NULL, "ich_spi_mode");
char *const arg = extract_programmer_param_str(cfg, "ich_spi_mode");
if (!arg) {
return 0;
} else if (!strcmp(arg, "hwseq")) {
@ -1964,7 +1964,7 @@ static void init_chipset_properties(struct swseq_data *swseq, struct hwseq_data
}
}
static int init_ich_default(void *spibar, enum ich_chipset ich_gen)
static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
{
unsigned int i;
uint16_t tmp2;
@ -1977,7 +1977,7 @@ static int init_ich_default(void *spibar, enum ich_chipset ich_gen)
init_chipset_properties(&swseq_data, &g_hwseq_data, &num_freg, &num_pr, &reg_pr0, ich_gen);
int ret = get_ich_spi_mode_param(&ich_spi_mode);
int ret = get_ich_spi_mode_param(cfg, &ich_spi_mode);
if (ret)
return ret;
@ -2212,7 +2212,7 @@ static int init_ich_default(void *spibar, enum ich_chipset ich_gen)
return 0;
}
int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
{
ich_generation = ich_gen;
ich_spibar = spibar;
@ -2224,7 +2224,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
return init_ich7_spi(spibar, ich_gen);
case CHIPSET_ICH8:
default: /* Future version might behave the same */
return init_ich_default(spibar, ich_gen);
return init_ich_default(cfg, spibar, ich_gen);
}
}

View File

@ -362,7 +362,7 @@ enum ich_chipset {
/* ichspi.c */
#if CONFIG_INTERNAL == 1
int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation);
int via_init_spi(uint32_t mmio_base);
/* amd_imc.c */