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ft2232_spi: Fix broken GPIOL cs_bits state (#126)

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This only sets 3rd CS# bit be asserted during read/write operations.

Tested and confirmed working on 4232H & PicoTap ft2232 programmers
against MX25R6435F & S25FL128S chips.

Signed-off-by: Samir Ibradzic <sibradzic@gmail.com>
Change-Id: Ia0ac14b9a52f251306887500dae3e57d73322157
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
sibradzic 2020-02-14 17:15:02 +09:00 committed by Edward O'Callaghan
parent ba6575de82
commit a43e44b6ab
1 changed files with 1 additions and 1 deletions
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2
ft2232_spi.c
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@ -495,7 +495,7 @@ static int ft2232_spi_send_command(struct flashctx *flash,
*/
msg_pspew("Assert CS#\n");
buf[i++] = SET_BITS_LOW;
buf[i++] = 0 & ~cs_bits; /* assertive */
buf[i++] = ~ 0x08 & cs_bits; /* assert CS (3rd) bit only */
buf[i++] = pindir;
if (writecnt) {