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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00

Add support for the AMD Am29F010A/B chips

Also, add support for the Silicon Image 3112(A) SATA controller.

Both have been tested by Andrew Morgan <ziltro@ziltro.com> on hardware
and work fine.

Corresponding to flashrom svn r613.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Andrew Morgan <ziltro@ziltro.com>
This commit is contained in:
Uwe Hermann 2009-06-19 15:54:39 +00:00
parent 95b67f7ad5
commit a8b3727a1e
3 changed files with 18 additions and 0 deletions

View File

@ -39,6 +39,22 @@ struct flashchip flashchips[] = {
* Probe function, Probe function timing, Erase function, Write function, Read function * Probe function, Probe function timing, Erase function, Write function, Read function
*/ */
{
.vendor = "AMD",
.name = "Am29F010A/B",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = AMD_ID,
.model_id = AM_29F010B, /* Same as Am29F010A */
.total_size = 128,
.page_size = 16 * 1024,
.tested = TEST_OK_PREW,
.probe = probe_29f040b,
.probe_timing = TIMING_FIXME,
.erase = erase_29f040b,
.write = write_pm29f002,
.read = read_memmapped,
},
{ {
.vendor = "AMD", .vendor = "AMD",
.name = "Am29F002(N)BB", .name = "Am29F002(N)BB",

View File

@ -39,6 +39,7 @@
#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
#define AMD_ID 0x01 /* AMD */ #define AMD_ID 0x01 /* AMD */
#define AM_29F010B 0x20 /* Same as Am29F010A */
#define AM_29F002BT 0xB0 #define AM_29F002BT 0xB0
#define AM_29F002BB 0x34 #define AM_29F002BB 0x34
#define AM_29F040B 0xA4 #define AM_29F040B 0xA4

View File

@ -35,6 +35,7 @@ uint16_t id;
struct pcidev_status satas_sii[] = { struct pcidev_status satas_sii[] = {
{0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
{0x1095, 0x3112, PCI_OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
{0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
{0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
{0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},