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flashchips: add definition of the XT25F02E SPI NOR flash

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This adds definition of the XT25F02E 2MBit SPI NOR Flash
from XTX Technology Limited.

Tested (Probe, Erase, Write, Read) with a VL805 USB3.0 bridge.

Datasheet:
https://datasheet.lcsc.com/lcsc/2006091008_XTX-XT25F02EDTIGT_C596313.pdf

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Change-Id: I295633c448c05520e4a6aa09c08bd7c9f2346d54
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/50263
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Neil Armstrong
2021-01-27 12:13:35 +00:00
committed by Anastasia Klimchuk
parent 7617467544
commit aa468cf0bd
2 changed files with 36 additions and 0 deletions
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1
include/flashchips.h
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@ -1045,6 +1045,7 @@
#define WINBOND_W49V002FA 0x32
#define XTX_ID 0x0B /* XTX Technology Limited */
#define XTX_XT25F02E 0x4012
#define XTX_XT25F64B 0x4017
#define ZETTADEVICE_ID 0xBA /* Zetta Device */