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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 23:43:42 +02:00

flash.h: Trivial indent fix of comment

Align with the properly tab indented comment on the CrOS
Flashrom side to make things consisent.

Change-Id: I09605bfec203d294077f298f8619bbc7d10cc68a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48204
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Edward O'Callaghan 2020-12-01 21:00:42 +11:00 committed by Edward O'Callaghan
parent f95cc8f9f6
commit b1e61bcf9c

View File

@ -269,9 +269,10 @@ struct flashrom_flashctx {
bool verify_whole_chip; bool verify_whole_chip;
} flags; } flags;
/* We cache the state of the extended address register (highest byte /* We cache the state of the extended address register (highest byte
of a 4BA for 3BA instructions) and the state of the 4BA mode here. * of a 4BA for 3BA instructions) and the state of the 4BA mode here.
If possible, we enter 4BA mode early. If that fails, we make use * If possible, we enter 4BA mode early. If that fails, we make use
of the extended address register. */ * of the extended address register.
*/
int address_high_byte; int address_high_byte;
bool in_4ba_mode; bool in_4ba_mode;
}; };