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Code Issues Releases Wiki Activity

flashchips: Mark W25Q256JV_Q as tested for read/write/erase

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As reported on the mailing list:
https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/Y27HIB5SPMQVGER37RLPV36DW33QGLR4/

Change-Id: I267ee7e86c682626ead2310b920a0e5026982312
Tested-by: Attila Veghelyi <aveghelyi@dension.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: attila-v
This commit is contained in:
Anastasia Klimchuk 2025-04-26 19:43:35 +10:00
parent 4d4688ccf1
commit b1f2cb7c1a
1 changed files with 1 additions and 1 deletions
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2
flashchips/winbond.c
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@ -546,7 +546,7 @@
/* supports SFDP */ /* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_WRSR2, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_WRSR2,
.tested = TEST_UNTESTED, .tested = TEST_OK_PREW,
.probe = PROBE_SPI_RDID, .probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO, .probe_timing = TIMING_ZERO,
.block_erasers = .block_erasers =