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digilent_spi: add a driver for the iCEblink40 development board

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This is driver that supports the Lattice iCE40 evaluation kits. On the
board is a SPI flash memory chip labeled ST 25P10VP.

Tested to work read/write/erase with "-p digilent_spi -c M25P10" or
with a patch that resets the part beforehands (in which case it gets
detected as a M25P10-A and is way faster due to paged writes).

Change-Id: I7ffcd9a2db4395816f0e8b6ce6c3b0d8e930c9e6
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/23338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Lubomir Rintel
2018-01-14 17:35:33 +01:00
committed by Nico Huber
parent ac01baa073
commit b2154e8a1d
5 changed files with 508 additions and 2 deletions
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12
programmer.h
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@ -111,6 +111,9 @@ enum programmer {
#endif
#if CONFIG_CH341A_SPI == 1
PROGRAMMER_CH341A_SPI,
#endif
#if CONFIG_DIGILENT_SPI == 1
PROGRAMMER_DIGILENT_SPI,
#endif
PROGRAMMER_INVALID /* This must always be the last entry. */
};
@ -549,6 +552,12 @@ void ch341a_spi_delay(unsigned int usecs);
extern const struct dev_entry devs_ch341a_spi[];
#endif
/* digilent_spi.c */
#if CONFIG_DIGILENT_SPI == 1
int digilent_spi_init(void);
extern const struct dev_entry devs_digilent_spi[];
#endif
/* flashrom.c */
struct decode_sizes {
uint32_t parallel;
@ -614,6 +623,9 @@ enum spi_controller {
#if CONFIG_CH341A_SPI == 1
SPI_CONTROLLER_CH341A_SPI,
#endif
#if CONFIG_DIGILENT_SPI == 1
SPI_CONTROLLER_DIGILENT_SPI,
#endif
};
#define MAX_DATA_UNSPECIFIED 0