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Support compilation for the ARM architecture (little-endian only)

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Note: The internal programmer will abort during processor check. This is
intentional.
The other hardware drivers (except those using port I/O) should work.

Corresponding to flashrom svn r1492.

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: David Hendricks <dhendrix@google.com>
Tested-by: Timo Juhani Lindfors <timo.lindfors@iki.fi>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
David Hendricks 2012-02-13 00:35:35 +00:00 committed by Carl-Daniel Hailfinger
parent bfd89a5635
commit b286da7ffc
5 changed files with 31 additions and 3 deletions
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5
Makefile
View File

@ -215,8 +215,9 @@ endif
# below uses CC itself. # below uses CC itself.
override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
ifeq ($(ARCH), ppc) # PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM.
# There's no PCI port I/O support on PPC/PowerPC, yet. # Right now this means the drivers below only work on x86.
ifneq ($(ARCH), x86)
ifeq ($(CONFIG_NIC3COM), yes) ifeq ($(CONFIG_NIC3COM), yes)
UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes
else else

2
arch.h
View File

@ -27,5 +27,7 @@
#define __FLASHROM_ARCH__ "mips" #define __FLASHROM_ARCH__ "mips"
#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
#define __FLASHROM_ARCH__ "ppc" #define __FLASHROM_ARCH__ "ppc"
#elif defined(__arm__)
#define __FLASHROM_ARCH__ "arm"
#endif #endif
__FLASHROM_ARCH__ __FLASHROM_ARCH__

14
hwaccess.c
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@ -116,6 +116,20 @@ void release_io_perms(void)
{ {
} }
#elif defined (__arm__)
static inline void sync_primitive(void)
{
}
void get_io_perms(void)
{
}
void release_io_perms(void)
{
}
#else #else
#error Unknown architecture #error Unknown architecture

11
hwaccess.h
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@ -68,6 +68,13 @@
#error Little-endian PowerPC #defines are unknown #error Little-endian PowerPC #defines are unknown
#endif #endif
#elif defined (__arm__)
#if defined (__ARMEL__)
#define __FLASHROM_LITTLE_ENDIAN__ 1
#else
#error Big-endian ARM #defines are unknown
#endif
#endif #endif
#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
@ -326,6 +333,10 @@ int libpayload_wrmsr(int addr, msr_t msr);
/* PCI port I/O is not yet implemented on MIPS. */ /* PCI port I/O is not yet implemented on MIPS. */
#elif defined(__arm__)
/* Non memory mapped I/O is not supported on ARM. */
#else #else
#error Unknown architecture, please check if it supports PCI port IO. #error Unknown architecture, please check if it supports PCI port IO.

2
programmer.h
View File

@ -527,6 +527,7 @@ int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int sta
int register_spi_programmer(const struct spi_programmer *programmer); int register_spi_programmer(const struct spi_programmer *programmer);
/* ichspi.c */ /* ichspi.c */
#if CONFIG_INTERNAL == 1
enum ich_chipset { enum ich_chipset {
CHIPSET_ICH_UNKNOWN, CHIPSET_ICH_UNKNOWN,
CHIPSET_ICH7 = 7, CHIPSET_ICH7 = 7,
@ -538,7 +539,6 @@ enum ich_chipset {
CHIPSET_7_SERIES_PANTHER_POINT CHIPSET_7_SERIES_PANTHER_POINT
}; };
#if CONFIG_INTERNAL == 1
extern uint32_t ichspi_bbar; extern uint32_t ichspi_bbar;
int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
enum ich_chipset ich_generation); enum ich_chipset ich_generation);