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Intel NIC with parallel flash support
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com> Corresponding to flashrom svn r1297. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Anton Kochkov <anton.kochkov@gmail.com> Acked-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
14
programmer.h
14
programmer.h
@ -67,6 +67,9 @@ enum programmer {
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#if CONFIG_RAYER_SPI == 1
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PROGRAMMER_RAYER_SPI,
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#endif
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#if CONFIG_NICINTEL == 1
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PROGRAMMER_NICINTEL,
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#endif
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#if CONFIG_NICINTEL_SPI == 1
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PROGRAMMER_NICINTEL_SPI,
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#endif
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@ -232,7 +235,7 @@ int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
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#endif
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/* print.c */
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#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1
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#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1
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void print_supported_pcidevs(const struct pcidev_status *devs);
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#endif
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@ -420,6 +423,15 @@ uint8_t nicnatsemi_chip_readb(const chipaddr addr);
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extern const struct pcidev_status nics_natsemi[];
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#endif
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/* nicintel.c */
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#if CONFIG_NICINTEL == 1
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int nicintel_init(void);
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int nicintel_shutdown(void);
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void nicintel_chip_writeb(uint8_t val, chipaddr addr);
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uint8_t nicintel_chip_readb(const chipaddr addr);
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extern const struct pcidev_status nics_intel[];
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#endif
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/* nicintel_spi.c */
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#if CONFIG_NICINTEL_SPI == 1
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int nicintel_spi_init(void);
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