openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00
Code Issues Releases Wiki Activity

gfxnvidia: restore flash interface access state explicitly

Browse Source 
Instead of using reversible write (rpci_write_long) that relies on
global state, do it manually. Save original PCI config space
register contents to programmer's structure during initialization
and restore it in programmer's shutdown.

TOPIC=reduce_global_pci_state
TEST=builds

Change-Id: I66c55daecf15b24b52aef33b14ff6746349cfb8c
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/389
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Alexander Goncharov 2022-08-18 11:08:37 +03:00 committed by Anastasia Klimchuk
parent 179e6e1423
commit bbf20776f8
1 changed files with 14 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
gfxnvidia.c
View File

@ -29,8 +29,13 @@
#define GFXNVIDIA_MEMMAP_MASK ((1 << 17) - 1)
#define GFXNVIDIA_MEMMAP_SIZE (16 * 1024 * 1024)
#define REG_FLASH_ACCESS 0x50
#define BIT_FLASH_ACCESS BIT(0)
struct gfxnvidia_data {
struct pci_dev *dev;
uint8_t *bar;
uint32_t flash_access;
};
static const struct dev_entry gfx_nvidia[] = {
@ -79,6 +84,11 @@ static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
static int gfxnvidia_shutdown(void *par_data)
{
struct gfxnvidia_data *data = par_data;
/* Restore original flash interface access state. */
pci_write_long(data->dev, REG_FLASH_ACCESS, data->flash_access);
free(par_data);
return 0;
}
@ -121,12 +131,13 @@ static int gfxnvidia_init(void)
msg_perr("Unable to allocate space for PAR master data\n");
return 1;
}
data->dev = dev;
data->bar = bar;
/* Allow access to flash interface (will disable screen). */
reg32 = pci_read_long(dev, 0x50);
reg32 &= ~(1 << 0);
rpci_write_long(dev, 0x50, reg32);
data->flash_access = pci_read_long(dev, REG_FLASH_ACCESS);
reg32 = data->flash_access & ~BIT_FLASH_ACCESS;
pci_write_long(dev, REG_FLASH_ACCESS, reg32);
/* Write/erase doesn't work. */
programmer_may_write = 0;