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Add support for SST SST25WF020A, SST25WF040B, SST25WF080B

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Apart from the strange ID (using Sanyo's vendor ID 0x62) the main
difference from the plain SST25WF series is that they lack op codes
0xAD (AAI Word program) and 0x52 (32K erase). The smallest version
does not support dual I/O operations either.

SST25WF080B was tested under Linux with spidev.

Corresponding to flashrom svn r1901.

Tested-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Ben Gardner
2015-11-22 02:23:31 +00:00
committed by Stefan Tauner
parent 94d8665ea3
commit bcf6109a76
4 changed files with 125 additions and 5 deletions
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13
spi25_statusreg.c
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@ -374,6 +374,19 @@ int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
return 0;
}
int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash)
{
uint8_t status = spi_read_status_register(flash);
spi_prettyprint_status_register_hex(status);
spi_prettyprint_status_register_bpl(status);
spi_prettyprint_status_register_bit(status, 6);
msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
spi_prettyprint_status_register_bp(status, 2);
spi_prettyprint_status_register_welwip(status);
return 0;
}
/* === Amic ===
* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
* spi_prettyprint_status_register_bp1_srwd or