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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

Add support for SST SST25WF020A, SST25WF040B, SST25WF080B

Apart from the strange ID (using Sanyo's vendor ID 0x62) the main
difference from the plain SST25WF series is that they lack op codes
0xAD (AAI Word program) and 0x52 (32K erase). The smallest version
does not support dual I/O operations either.

SST25WF080B was tested under Linux with spidev.

Corresponding to flashrom svn r1901.

Tested-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Ben Gardner 2015-11-22 02:23:31 +00:00 committed by Stefan Tauner
parent 94d8665ea3
commit bcf6109a76
4 changed files with 125 additions and 5 deletions

View File

@ -72,6 +72,7 @@ int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash);
int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash);
int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash);
int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash);
int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash);
int spi_disable_blockprotect(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash);
int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash);
int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash);

View File

@ -11855,6 +11855,111 @@ const struct flashchip flashchips[] = {
.voltage = {2700, 3600}, .voltage = {2700, 3600},
}, },
{
.vendor = "SST",
.name = "SST25WF020A",
.bustype = BUS_SPI,
.manufacture_id = SANYO_ID, /* See flashchips.h */
.model_id = SST_SST25WF020A,
.total_size = 256,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 64} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {64 * 1024, 4} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {256 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {256 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
},
.printlock = spi_prettyprint_status_register_bp2_tb_bpl,
.unlock = spi_disable_blockprotect_bp2_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) supported */
.voltage = {1650, 1950},
},
{
.vendor = "SST",
.name = "SST25WF040B",
.bustype = BUS_SPI,
.manufacture_id = SANYO_ID, /* See flashchips.h */
.model_id = SST_SST25WF040B,
.total_size = 512,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 128} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {64 * 1024, 8} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {512 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {512 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
},
.printlock = spi_prettyprint_status_register_bp2_tb_bpl,
.unlock = spi_disable_blockprotect_bp2_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B), dual O (0x3B), dual I/O read (0xBB) supported */
.voltage = {1650, 1950},
},
{
.vendor = "SST",
.name = "SST25WF080B",
.bustype = BUS_SPI,
.manufacture_id = SANYO_ID, /* See flashchips.h */
.model_id = SST_SST25WF080B,
.total_size = 1024,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 256} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {64 * 1024, 16} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
},
.printlock = spi_prettyprint_status_register_bp2_tb_bpl,
.unlock = spi_disable_blockprotect_bp2_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B), dual O (0x3B), dual I/O read (0xBB) supported */
.voltage = {1650, 1950},
},
{ {
.vendor = "SST", .vendor = "SST",
.name = "SST25VF080B", .name = "SST25VF080B",

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@ -670,11 +670,12 @@
#define SST_SST25WF020 0x2503 #define SST_SST25WF020 0x2503
#define SST_SST25WF040 0x2504 #define SST_SST25WF040 0x2504
#define SST_SST25WF080 0x2505 #define SST_SST25WF080 0x2505
/* There exist some successors to members of the SST25WF family with alphabetic suffixes. They have very weird /* There exist some successors to members of the SST25WF family with alphabetic suffixes. Their datasheets show
* IDs and were not spotted in the wild yet. Their datasheets show a 4 byte long response w/o a vendor ID. */ * a 4 byte long response w/o a vendor ID. The first byte is 0x62 that is actually Sanyo's and might be due to
#define SST_SST25WF020A /* 0x62 0x16 0x12 0x00 */ * a collaboration in the mid 2000ies between Sanyo and SST. */
#define SST_SST25WF040B /* 0x62 0x16 0x13 0x00 */ #define SST_SST25WF020A 0x1612
#define SST_SST25WF080B /* 0x62 0x16 0x14 0x00 */ #define SST_SST25WF040B 0x1613
#define SST_SST25WF080B 0x1614
#define SST_SST25VF512_REMS 0x48 /* REMS or RES opcode, same as SST25VF512A */ #define SST_SST25VF512_REMS 0x48 /* REMS or RES opcode, same as SST25VF512A */
#define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode, same as SST25VF010A */ #define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode, same as SST25VF010A */
#define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode, same as SST25LF020A */ #define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode, same as SST25LF020A */

View File

@ -374,6 +374,19 @@ int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
return 0; return 0;
} }
int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash)
{
uint8_t status = spi_read_status_register(flash);
spi_prettyprint_status_register_hex(status);
spi_prettyprint_status_register_bpl(status);
spi_prettyprint_status_register_bit(status, 6);
msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
spi_prettyprint_status_register_bp(status, 2);
spi_prettyprint_status_register_welwip(status);
return 0;
}
/* === Amic === /* === Amic ===
* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
* spi_prettyprint_status_register_bp1_srwd or * spi_prettyprint_status_register_bp1_srwd or