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ichspi.c: add FPB (Flash Partition Boundary) macros and init printing
Corresponding to flashrom svn r1361. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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ichspi.c
7
ichspi.c
@ -131,6 +131,10 @@
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#define ICH9_REG_BBAR 0xA0 /* 32 Bits BIOS Base Address Configuration */
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#define ICH9_REG_BBAR 0xA0 /* 32 Bits BIOS Base Address Configuration */
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#define BBAR_MASK 0x00ffff00 /* 8-23: Bottom of System Flash */
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#define BBAR_MASK 0x00ffff00 /* 8-23: Bottom of System Flash */
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#define ICH9_REG_FPB 0xD0 /* 32 Bits Flash Partition Boundary */
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#define FPB_FPBA_OFF 0 /* 0-12: Block/Sector Erase Size */
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#define FPB_FPBA (0x1FFF << FPB_FPBA_OFF)
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// ICH9R SPI commands
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// ICH9R SPI commands
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#define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0
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#define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0
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#define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1
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#define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1
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@ -1324,6 +1328,9 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
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ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
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ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
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msg_pdbg("0xA0: 0x%08x (BBAR)\n",
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msg_pdbg("0xA0: 0x%08x (BBAR)\n",
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ichspi_bbar);
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ichspi_bbar);
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tmp = mmio_readl(ich_spibar + ICH9_REG_FPB);
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msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp);
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ich_init_opcodes();
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ich_init_opcodes();
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break;
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break;
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default:
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default:
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