mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 23:22:37 +02:00
tree: Make internal functions static
None of these functions are used outside of the files they are defined in, so make them all static. Change-Id: Ie9cbe12d289bcedacf2f1bf483ae64ef8039ccc1 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
parent
cb44eb7dad
commit
beeb8bc925
@ -67,7 +67,7 @@ void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
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}
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}
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/* Winbond W83697 documentation indicates that the index register has to be written for each access. */
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/* Winbond W83697 documentation indicates that the index register has to be written for each access. */
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void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
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static void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
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{
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{
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uint8_t tmp;
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uint8_t tmp;
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@ -519,7 +519,7 @@ static void w836xx_memw_enable(uint16_t port)
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* Supported chips:
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* Supported chips:
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* W83697HF/F/HG, W83697SF/UF/UG
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* W83697HF/F/HG, W83697SF/UF/UG
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*/
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*/
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void w83697xx_memw_enable(uint16_t port)
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static void w83697xx_memw_enable(uint16_t port)
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{
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{
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w836xx_ext_enter(port);
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w836xx_ext_enter(port);
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if (!(sio_read(port, 0x24) & 0x02)) { /* Flash ROM enabled? */
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if (!(sio_read(port, 0x24) & 0x02)) { /* Flash ROM enabled? */
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4
dmi.c
4
dmi.c
@ -250,7 +250,7 @@ static int legacy_decode(uint8_t *buf)
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return 0;
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return 0;
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}
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}
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int dmi_fill(void)
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static int dmi_fill(void)
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{
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{
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size_t fp;
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size_t fp;
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uint8_t *dmi_mem;
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uint8_t *dmi_mem;
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@ -344,7 +344,7 @@ static char *get_dmi_string(const char *string_name)
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return result;
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return result;
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}
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}
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int dmi_fill(void)
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static int dmi_fill(void)
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{
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{
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int i;
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int i;
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char *chassis_type;
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char *chassis_type;
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2
edi.c
2
edi.c
@ -457,7 +457,7 @@ int edi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsi
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return 0;
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return 0;
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}
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}
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int edi_shutdown(void *data)
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static int edi_shutdown(void *data)
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{
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{
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struct flashctx *flash;
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struct flashctx *flash;
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int rc;
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int rc;
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@ -738,8 +738,7 @@ static int compare_range(const uint8_t *wantbuf, const uint8_t *havebuf, unsigne
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}
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}
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/* start is an offset to the base address of the flash chip */
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/* start is an offset to the base address of the flash chip */
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int check_erased_range(struct flashctx *flash, unsigned int start,
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static int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
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unsigned int len)
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{
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{
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int ret;
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int ret;
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uint8_t *cmpbuf = malloc(len);
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uint8_t *cmpbuf = malloc(len);
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@ -2055,7 +2054,7 @@ void list_programmers_linebreak(int startcol, int cols, int paren)
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}
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}
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}
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}
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void print_sysinfo(void)
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static void print_sysinfo(void)
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{
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{
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#if IS_WINDOWS
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#if IS_WINDOWS
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SYSTEM_INFO si;
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SYSTEM_INFO si;
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@ -2235,8 +2234,8 @@ int selfcheck(void)
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/* FIXME: This function signature needs to be improved once doit() has a better
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/* FIXME: This function signature needs to be improved once doit() has a better
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* function signature.
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* function signature.
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*/
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*/
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int chip_safety_check(const struct flashctx *flash, int force, int read_it, int write_it, int erase_it,
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static int chip_safety_check(const struct flashctx *flash, int force,
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int verify_it)
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int read_it, int write_it, int erase_it, int verify_it)
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{
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{
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const struct flashchip *chip = flash->chip;
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const struct flashchip *chip = flash->chip;
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@ -223,7 +223,7 @@ struct undo_mmio_write_data {
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};
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};
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};
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};
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int undo_mmio_write(void *p)
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static int undo_mmio_write(void *p)
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{
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{
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struct undo_mmio_write_data *data = p;
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struct undo_mmio_write_data *data = p;
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msg_pdbg("Restoring MMIO space at %p\n", data->addr);
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msg_pdbg("Restoring MMIO space at %p\n", data->addr);
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@ -442,7 +442,7 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
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msg_pdbg2("\n");
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msg_pdbg2("\n");
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}
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}
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void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
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static void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
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{
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{
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static const char * const str_GPIO12[4] = {
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static const char * const str_GPIO12[4] = {
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"GPIO12",
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"GPIO12",
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@ -504,7 +504,7 @@ static void prettyprint_ich_descriptor_straps_56_pciecs(uint8_t conf, uint8_t of
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msg_pdbg2("\n");
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msg_pdbg2("\n");
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}
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}
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void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
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static void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
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{
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{
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/* PCHSTRP4 */
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/* PCHSTRP4 */
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msg_pdbg2("Intel PHY is %s.\n",
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msg_pdbg2("Intel PHY is %s.\n",
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@ -528,7 +528,7 @@ void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_st
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/* PCHSTRP8 */
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/* PCHSTRP8 */
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}
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}
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void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
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static void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
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{
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{
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/* PCHSTRP11 */
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/* PCHSTRP11 */
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msg_pdbg2("SMLink1 GP Address is %sabled.\n",
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msg_pdbg2("SMLink1 GP Address is %sabled.\n",
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@ -544,7 +544,7 @@ void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_s
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/* PCHSTRP13 */
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/* PCHSTRP13 */
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}
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}
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void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
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static void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
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{
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{
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static const uint8_t dec_t209min[4] = {
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static const uint8_t dec_t209min[4] = {
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100,
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100,
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@ -642,7 +642,7 @@ void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s
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msg_pdbg2("\n");
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msg_pdbg2("\n");
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}
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}
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void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
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static void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
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{
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{
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msg_pdbg2("--- PCH ---\n");
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msg_pdbg2("--- PCH ---\n");
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@ -811,7 +811,7 @@ void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_des
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}
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}
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}
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}
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void prettyprint_rdid(uint32_t reg_val)
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static void prettyprint_rdid(uint32_t reg_val)
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{
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{
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uint8_t mid = reg_val & 0xFF;
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uint8_t mid = reg_val & 0xFF;
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uint16_t did = ((reg_val >> 16) & 0xFF) | (reg_val & 0xFF00);
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uint16_t did = ((reg_val >> 16) & 0xFF) | (reg_val & 0xFF00);
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@ -106,7 +106,7 @@ static int wait_for(const unsigned int mask, const unsigned int expected_value,
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/* IT8502 employs a scratch RAM when flash is being updated. Call the following
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/* IT8502 employs a scratch RAM when flash is being updated. Call the following
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* two functions before/after flash erase/program. */
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* two functions before/after flash erase/program. */
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void it85xx_enter_scratch_rom(void)
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static void it85xx_enter_scratch_rom(void)
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{
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{
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int ret, tries;
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int ret, tries;
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@ -163,7 +163,7 @@ void it85xx_enter_scratch_rom(void)
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}
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}
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}
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}
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void it85xx_exit_scratch_rom(void)
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static void it85xx_exit_scratch_rom(void)
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{
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{
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#if 0
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#if 0
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int ret;
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int ret;
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@ -57,7 +57,7 @@ void exit_conf_mode_ite(uint16_t port)
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sio_write(port, 0x02, 0x02);
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sio_write(port, 0x02, 0x02);
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}
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}
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uint16_t probe_id_ite(uint16_t port)
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static uint16_t probe_id_ite(uint16_t port)
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{
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{
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uint16_t id;
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uint16_t id;
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2
pcidev.c
2
pcidev.c
@ -266,7 +266,7 @@ struct undo_pci_write_data {
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};
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};
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};
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};
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int undo_pci_write(void *p)
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static int undo_pci_write(void *p)
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{
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{
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struct undo_pci_write_data *data = p;
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struct undo_pci_write_data *data = p;
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if (pacc == NULL || data->dev == NULL) {
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if (pacc == NULL || data->dev == NULL) {
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@ -97,7 +97,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len)
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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void sys_physunmap_unaligned(void *virt_addr, size_t len)
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static void sys_physunmap_unaligned(void *virt_addr, size_t len)
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{
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{
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__dpmi_meminfo mi;
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__dpmi_meminfo mi;
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@ -126,7 +126,7 @@ void *sys_physmap(uintptr_t phys_addr, size_t len)
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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void sys_physunmap_unaligned(void *virt_addr, size_t len)
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static void sys_physunmap_unaligned(void *virt_addr, size_t len)
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{
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{
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}
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}
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#elif defined(__MACH__) && defined(__APPLE__)
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#elif defined(__MACH__) && defined(__APPLE__)
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@ -147,7 +147,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len)
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_rw_uncached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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#define sys_physmap_ro_cached sys_physmap
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void sys_physunmap_unaligned(void *virt_addr, size_t len)
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static void sys_physunmap_unaligned(void *virt_addr, size_t len)
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{
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{
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unmap_physical(virt_addr, len);
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unmap_physical(virt_addr, len);
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}
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}
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@ -200,7 +200,7 @@ static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len)
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return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
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return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
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}
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}
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void sys_physunmap_unaligned(void *virt_addr, size_t len)
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static void sys_physunmap_unaligned(void *virt_addr, size_t len)
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{
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{
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munmap(virt_addr, len);
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munmap(virt_addr, len);
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}
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}
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2
print.c
2
print.c
@ -423,7 +423,7 @@ static void print_supported_boards_helper(const struct board_info *boards,
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}
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}
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#endif
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#endif
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void print_supported_devs(const struct programmer_entry prog, const char *const type)
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static void print_supported_devs(const struct programmer_entry prog, const char *const type)
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{
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{
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const struct dev_entry *const devs = prog.devs.dev;
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const struct dev_entry *const devs = prog.devs.dev;
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msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name);
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msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name);
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6
spi25.c
6
spi25.c
@ -455,19 +455,19 @@ static int spi_write_cmd(struct flashctx *const flash, const uint8_t op,
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return result ? result : status;
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return result ? result : status;
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}
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}
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int spi_chip_erase_60(struct flashctx *flash)
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static int spi_chip_erase_60(struct flashctx *flash)
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{
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{
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/* This usually takes 1-85s, so wait in 1s steps. */
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/* This usually takes 1-85s, so wait in 1s steps. */
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return spi_simple_write_cmd(flash, 0x60, 1000 * 1000);
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return spi_simple_write_cmd(flash, 0x60, 1000 * 1000);
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}
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}
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int spi_chip_erase_62(struct flashctx *flash)
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static int spi_chip_erase_62(struct flashctx *flash)
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{
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{
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/* This usually takes 2-5s, so wait in 100ms steps. */
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/* This usually takes 2-5s, so wait in 100ms steps. */
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return spi_simple_write_cmd(flash, 0x62, 100 * 1000);
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return spi_simple_write_cmd(flash, 0x62, 100 * 1000);
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}
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}
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int spi_chip_erase_c7(struct flashctx *flash)
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static int spi_chip_erase_c7(struct flashctx *flash)
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{
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{
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/* This usually takes 1-85s, so wait in 1s steps. */
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/* This usually takes 1-85s, so wait in 1s steps. */
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return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000);
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return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000);
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/* The programmer shifts bits in the wrong order for SPI, so we use this method to reverse the bits when needed.
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/* The programmer shifts bits in the wrong order for SPI, so we use this method to reverse the bits when needed.
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* http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */
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* http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */
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uint8_t reverse(uint8_t b)
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static uint8_t reverse(uint8_t b)
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{
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{
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return ((b * 0x0802LU & 0x22110LU) | (b * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16;
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return ((b * 0x0802LU & 0x22110LU) | (b * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16;
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}
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}
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