tree: Make internal functions static

None of these functions are used outside of the files they are defined
in, so make them all static.

Change-Id: Ie9cbe12d289bcedacf2f1bf483ae64ef8039ccc1
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33667
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>

board_enable.c

@@ -67,7 +67,7 @@ void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
 }
 
 /* Winbond W83697 documentation indicates that the index register has to be written for each access. */
-void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
+static void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
 {
 	uint8_t tmp;
 
@@ -519,7 +519,7 @@ static void w836xx_memw_enable(uint16_t port)
  * Supported chips:
  * W83697HF/F/HG, W83697SF/UF/UG
  */
-void w83697xx_memw_enable(uint16_t port)
+static void w83697xx_memw_enable(uint16_t port)
 {
 	w836xx_ext_enter(port);
 	if (!(sio_read(port, 0x24) & 0x02)) { /* Flash ROM enabled? */

dmi.c

@@ -250,7 +250,7 @@ static int legacy_decode(uint8_t *buf)
 	return 0;
 }
 
-int dmi_fill(void)
+static int dmi_fill(void)
 {
 	size_t fp;
 	uint8_t *dmi_mem;
@@ -344,7 +344,7 @@ static char *get_dmi_string(const char *string_name)
 	return result;
 }
 
-int dmi_fill(void)
+static int dmi_fill(void)
 {
 	int i;
 	char *chassis_type;

edi.c

@@ -457,7 +457,7 @@ int edi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsi
 	return 0;
 }
 
-int edi_shutdown(void *data)
+static int edi_shutdown(void *data)
 {
 	struct flashctx *flash;
 	int rc;

flashrom.c

@@ -738,8 +738,7 @@ static int compare_range(const uint8_t *wantbuf, const uint8_t *havebuf, unsigne
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashctx *flash, unsigned int start,
-		       unsigned int len)
+static int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -2055,7 +2054,7 @@ void list_programmers_linebreak(int startcol, int cols, int paren)
 	}
 }
 
-void print_sysinfo(void)
+static void print_sysinfo(void)
 {
 #if IS_WINDOWS
 	SYSTEM_INFO si;
@@ -2235,8 +2234,8 @@ int selfcheck(void)
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(const struct flashctx *flash, int force, int read_it, int write_it, int erase_it,
-		      int verify_it)
+static int chip_safety_check(const struct flashctx *flash, int force,
+			     int read_it, int write_it, int erase_it, int verify_it)
 {
 	const struct flashchip *chip = flash->chip;
 

hwaccess.c

@@ -223,7 +223,7 @@ struct undo_mmio_write_data {
 	};
 };
 
-int undo_mmio_write(void *p)
+static int undo_mmio_write(void *p)
 {
 	struct undo_mmio_write_data *data = p;
 	msg_pdbg("Restoring MMIO space at %p\n", data->addr);

ich_descriptors.c

@@ -442,7 +442,7 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
+static void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
 {
 	static const char * const str_GPIO12[4] = {
 		"GPIO12",
@@ -504,7 +504,7 @@ static void prettyprint_ich_descriptor_straps_56_pciecs(uint8_t conf, uint8_t of
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
 {
 	/* PCHSTRP4 */
 	msg_pdbg2("Intel PHY is %s.\n",
@@ -528,7 +528,7 @@ void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_st
 	/* PCHSTRP8 */
 }
 
-void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
 {
 	/* PCHSTRP11 */
 	msg_pdbg2("SMLink1 GP Address is %sabled.\n",
@@ -544,7 +544,7 @@ void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_s
 	/* PCHSTRP13 */
 }
 
-void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
 {
 	static const uint8_t dec_t209min[4] = {
 		100,
@@ -642,7 +642,7 @@ void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
 {
 	msg_pdbg2("--- PCH ---\n");
 
@@ -811,7 +811,7 @@ void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_des
 	}
 }
 
-void prettyprint_rdid(uint32_t reg_val)
+static void prettyprint_rdid(uint32_t reg_val)
 {
 	uint8_t mid = reg_val & 0xFF;
 	uint16_t did = ((reg_val >> 16) & 0xFF) | (reg_val & 0xFF00);

it85spi.c

@@ -106,7 +106,7 @@ static int wait_for(const unsigned int mask, const unsigned int expected_value,
 
 /* IT8502 employs a scratch RAM when flash is being updated. Call the following
  * two functions before/after flash erase/program. */
-void it85xx_enter_scratch_rom(void)
+static void it85xx_enter_scratch_rom(void)
 {
 	int ret, tries;
 
@@ -163,7 +163,7 @@ void it85xx_enter_scratch_rom(void)
 	}
 }
 
-void it85xx_exit_scratch_rom(void)
+static void it85xx_exit_scratch_rom(void)
 {
 #if 0
 	int ret;

it87spi.c

@@ -57,7 +57,7 @@ void exit_conf_mode_ite(uint16_t port)
 	sio_write(port, 0x02, 0x02);
 }
 
-uint16_t probe_id_ite(uint16_t port)
+static uint16_t probe_id_ite(uint16_t port)
 {
 	uint16_t id;
 

pcidev.c

@@ -266,7 +266,7 @@ struct undo_pci_write_data {
 	};
 };
 
-int undo_pci_write(void *p)
+static int undo_pci_write(void *p)
 {
 	struct undo_pci_write_data *data = p;
 	if (pacc == NULL || data->dev == NULL) {

physmap.c

@@ -97,7 +97,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len)
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	__dpmi_meminfo mi;
 
@@ -126,7 +126,7 @@ void *sys_physmap(uintptr_t phys_addr, size_t len)
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 }
 #elif defined(__MACH__) && defined(__APPLE__)
@@ -147,7 +147,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len)
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	unmap_physical(virt_addr, len);
 }
@@ -200,7 +200,7 @@ static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len)
 	return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
 }
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	munmap(virt_addr, len);
 }

print.c

@@ -423,7 +423,7 @@ static void print_supported_boards_helper(const struct board_info *boards,
 }
 #endif
 
-void print_supported_devs(const struct programmer_entry prog, const char *const type)
+static void print_supported_devs(const struct programmer_entry prog, const char *const type)
 {
 	const struct dev_entry *const devs = prog.devs.dev;
 	msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name);

spi25.c

@@ -455,19 +455,19 @@ static int spi_write_cmd(struct flashctx *const flash, const uint8_t op,
 	return result ? result : status;
 }
 
-int spi_chip_erase_60(struct flashctx *flash)
+static int spi_chip_erase_60(struct flashctx *flash)
 {
 	/* This usually takes 1-85s, so wait in 1s steps. */
 	return spi_simple_write_cmd(flash, 0x60, 1000 * 1000);
 }
 
-int spi_chip_erase_62(struct flashctx *flash)
+static int spi_chip_erase_62(struct flashctx *flash)
 {
 	/* This usually takes 2-5s, so wait in 100ms steps. */
 	return spi_simple_write_cmd(flash, 0x62, 100 * 1000);
 }
 
-int spi_chip_erase_c7(struct flashctx *flash)
+static int spi_chip_erase_c7(struct flashctx *flash)
 {
 	/* This usually takes 1-85s, so wait in 1s steps. */
 	return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000);

usbblaster_spi.c

@@ -67,7 +67,7 @@ static struct ftdi_context ftdic;
 
 /* The programmer shifts bits in the wrong order for SPI, so we use this method to reverse the bits when needed.
  * http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */
-uint8_t reverse(uint8_t b)
+static uint8_t reverse(uint8_t b)
 {
 	return ((b * 0x0802LU & 0x22110LU) | (b * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16;
 }