1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver

Does not support reading or writing the fake chip yet.

flashrom --programmer dummy
also enables the dummy SPI controller driver.

Testing the dummy SPI driver revealed a RDID debug printing bug in the
SPI core. Fix that as well.

Corresponding to flashrom svn r507.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
2009-05-14 12:59:36 +00:00
parent d02b73f9e9
commit bfe2e0cf67
3 changed files with 33 additions and 3 deletions

10
spi.c
View File

@ -46,6 +46,8 @@ int spi_command(unsigned int writecnt, unsigned int readcnt,
return sb600_spi_command(writecnt, readcnt, writearr, readarr);
case BUS_TYPE_WBSIO_SPI:
return wbsio_spi_command(writecnt, readcnt, writearr, readarr);
case BUS_TYPE_DUMMY_SPI:
return dummy_spi_command(writecnt, readcnt, writearr, readarr);
default:
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
@ -58,12 +60,15 @@ static int spi_rdid(unsigned char *readarr, int bytes)
{
const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
int ret;
int i;
ret = spi_command(sizeof(cmd), bytes, cmd, readarr);
if (ret)
return ret;
printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1],
readarr[2]);
printf_debug("RDID returned");
for (i = 0; i < bytes; i++)
printf_debug(" 0x%02x", readarr[i]);
printf_debug("\n");
return 0;
}
@ -202,6 +207,7 @@ int probe_spi_rdid4(struct flashchip *flash)
case BUS_TYPE_VIA_SPI:
case BUS_TYPE_SB600_SPI:
case BUS_TYPE_WBSIO_SPI:
case BUS_TYPE_DUMMY_SPI:
return probe_spi_rdid_generic(flash, 4);
default:
printf_debug("4b ID not supported on this SPI controller\n");