openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00
Code Issues Releases Wiki Activity

Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down

Browse Source 
Corresponding to flashrom svn r364 and coreboot v2 svn r3805.

Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This commit is contained in:
FENG yu ning
2008-12-08 18:16:58 +00:00
committed by Stefan Reinauer
parent ff692fb567
commit c05a295dc3
3 changed files with 145 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
flash.h
View File

@ -51,6 +51,12 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
/* for pairing opcodes with their required preop */
struct preop_opcode_pair {
uint8_t preop;
uint8_t opcode;
};
struct flashchip {
const char *vendor;
const char *name;
@ -76,6 +82,8 @@ struct flashchip {
int (*write) (struct flashchip *flash, uint8_t *buf);
int (*read) (struct flashchip *flash, uint8_t *buf);
struct preop_opcode_pair *preop_opcode_pairs;
/* Some flash devices have an additional register space. */
volatile uint8_t *virtual_memory;
volatile uint8_t *virtual_registers;