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This patch combines three previously posted patches in a revised form.
one is even stolen from Stefan Reinauer (remove umlauts from man page).

Corresponding to flashrom svn r1317.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Signed-off-by: Stefan Reinauer <reinauer@google.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner 2011-05-19 02:58:17 +00:00
parent 7a3bd8f28f
commit c0aaf95487
11 changed files with 49 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
chipset_enable.c
View File

@ -558,8 +558,8 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
#define CS5530_ENABLE_SA20 (1 << 6) #define CS5530_ENABLE_SA20 (1 << 6)
buses_supported = CHIP_BUSTYPE_PARALLEL; buses_supported = CHIP_BUSTYPE_PARALLEL;
/* Decode 0x000E0000-0x000FFFFF (128 KB), not just 64 KB, and /* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and
* decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 KB. * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB.
* FIXME: Should we really touch the low mapping below 1 MB? Flashrom * FIXME: Should we really touch the low mapping below 1 MB? Flashrom
* ignores that region completely. * ignores that region completely.
* Make the configured ROM areas writable. * Make the configured ROM areas writable.

2
drkaiser.c
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@ -49,7 +49,7 @@ int drkaiser_init(void)
rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR,
PCI_MAGIC_DRKAISER_VALUE); PCI_MAGIC_DRKAISER_VALUE);
/* Map 128KB flash memory window. */ /* Map 128kB flash memory window. */
drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory",
addr, 128 * 1024); addr, 128 * 1024);

5
flash.h
View File

@ -107,7 +107,9 @@ struct flashchip {
uint32_t manufacture_id; uint32_t manufacture_id;
uint32_t model_id; uint32_t model_id;
/* Total chip size in kilobytes */
int total_size; int total_size;
/* Chip page size in bytes */
int page_size; int page_size;
int feature_bits; int feature_bits;
@ -125,6 +127,9 @@ struct flashchip {
/* /*
* Erase blocks and associated erase function. Any chip erase function * Erase blocks and associated erase function. Any chip erase function
* is stored as chip-sized virtual block together with said function. * is stored as chip-sized virtual block together with said function.
* The first one that fits will be chosen. There is currently no way to
* influence that behaviour. For testing just comment out the other
* elements or set the function pointer to NULL.
*/ */
struct block_eraser { struct block_eraser {
struct eraseblock{ struct eraseblock{

4
flashchips.h
View File

@ -145,9 +145,9 @@
#define ATMEL_AT25FS040 0x6604 #define ATMEL_AT25FS040 0x6604
#define ATMEL_AT26DF041 0x4400 #define ATMEL_AT26DF041 0x4400
#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */ #define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
#define ATMEL_AT26DF081A 0x4501 #define ATMEL_AT26DF081A 0x4501
#define ATMEL_AT26DF161 0x4600 #define ATMEL_AT26DF161 0x4600
#define ATMEL_AT26DF161A 0x4601 #define ATMEL_AT26DF161A 0x4601
#define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */ #define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */
#define ATMEL_AT26F004 0x0400 #define ATMEL_AT26F004 0x0400
#define ATMEL_AT29C040A 0xA4 #define ATMEL_AT29C040A 0xA4

2
flashrom.8
View File

@ -564,7 +564,7 @@ Idwer Vollering
.br .br
Joe Bao Joe Bao
.br .br
Jörg Fischer Joerg Fischer
.br .br
Joshua Roys Joshua Roys
.br .br

4
flashrom.c
View File

@ -1140,7 +1140,7 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force)
for (flash = flashchips + startchip; flash && flash->name; flash++) { for (flash = flashchips + startchip; flash && flash->name; flash++) {
if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
continue; continue;
msg_gdbg("Probing for %s %s, %d KB: ", msg_gdbg("Probing for %s %s, %d kB: ",
flash->vendor, flash->name, flash->total_size); flash->vendor, flash->name, flash->total_size);
if (!flash->probe && !force) { if (!flash->probe && !force) {
msg_gdbg("failed! flashrom has no probe function for " msg_gdbg("failed! flashrom has no probe function for "
@ -1201,7 +1201,7 @@ notfound:
#endif #endif
snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name);
msg_cinfo("%s chip \"%s %s\" (%d KB, %s) %s.\n", msg_cinfo("%s chip \"%s %s\" (%d kB, %s) %s.\n",
force ? "Assuming" : "Found", force ? "Assuming" : "Found",
flash->vendor, flash->name, flash->total_size, flash->vendor, flash->name, flash->total_size,
flashbuses_to_text(flash->bustype), location); flashbuses_to_text(flash->bustype), location);

55
ichspi.c
View File

@ -43,17 +43,18 @@
#include "spi.h" #include "spi.h"
/* ICH9 controller register definition */ /* ICH9 controller register definition */
#define ICH9_REG_FADDR 0x08 /* 32 Bits */ #define ICH9_REG_FADDR 0x08 /* 32 Bits */
#define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */
#define ICH9_REG_SSFS 0x90 /* 08 Bits */ #define ICH9_REG_SSFS 0x90 /* 08 Bits */
#define SSFS_SCIP 0x00000001 #define SSFS_SCIP 0x00000001
#define SSFS_CDS 0x00000004 #define SSFS_CDS 0x00000004
#define SSFS_FCERR 0x00000008 #define SSFS_FCERR 0x00000008
#define SSFS_AEL 0x00000010 #define SSFS_AEL 0x00000010
/* The following bits are reserved in SSFS: 1,5-7. */
#define SSFS_RESERVED_MASK 0x000000e2 #define SSFS_RESERVED_MASK 0x000000e2
#define ICH9_REG_SSFC 0x91 /* 24 Bits */ #define ICH9_REG_SSFC 0x91 /* 24 Bits */
#define SSFC_SCGO 0x00000200 #define SSFC_SCGO 0x00000200
#define SSFC_ACS 0x00000400 #define SSFC_ACS 0x00000400
#define SSFC_SPOP 0x00000800 #define SSFC_SPOP 0x00000800
@ -64,20 +65,23 @@
#define SSFC_SCF 0x01000000 #define SSFC_SCF 0x01000000
#define SSFC_SCF_20MHZ 0x00000000 #define SSFC_SCF_20MHZ 0x00000000
#define SSFC_SCF_33MHZ 0x01000000 #define SSFC_SCF_33MHZ 0x01000000
/* We combine SSFS and SSFC to one 32-bit word,
* therefore SSFC bits are off by 8.
* The following bits are reserved in SSFC: 23-19,7,0. */
#define SSFC_RESERVED_MASK 0xf8008100 #define SSFC_RESERVED_MASK 0xf8008100
#define ICH9_REG_PREOP 0x94 /* 16 Bits */ #define ICH9_REG_PREOP 0x94 /* 16 Bits */
#define ICH9_REG_OPTYPE 0x96 /* 16 Bits */ #define ICH9_REG_OPTYPE 0x96 /* 16 Bits */
#define ICH9_REG_OPMENU 0x98 /* 64 Bits */ #define ICH9_REG_OPMENU 0x98 /* 64 Bits */
// ICH9R SPI commands // ICH9R SPI commands
#define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0
#define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1
#define SPI_OPCODE_TYPE_READ_WITH_ADDRESS 2 #define SPI_OPCODE_TYPE_READ_WITH_ADDRESS 2
#define SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 3 #define SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 3
// ICH7 registers // ICH7 registers
#define ICH7_REG_SPIS 0x00 /* 16 Bits */ #define ICH7_REG_SPIS 0x00 /* 16 Bits */
#define SPIS_SCIP 0x0001 #define SPIS_SCIP 0x0001
#define SPIS_GRANT 0x0002 #define SPIS_GRANT 0x0002
#define SPIS_CDS 0x0004 #define SPIS_CDS 0x0004
@ -94,17 +98,17 @@
bit 7 is used with fast read and one shot controls CS de-assert? bit 7 is used with fast read and one shot controls CS de-assert?
*/ */
#define ICH7_REG_SPIC 0x02 /* 16 Bits */ #define ICH7_REG_SPIC 0x02 /* 16 Bits */
#define SPIC_SCGO 0x0002 #define SPIC_SCGO 0x0002
#define SPIC_ACS 0x0004 #define SPIC_ACS 0x0004
#define SPIC_SPOP 0x0008 #define SPIC_SPOP 0x0008
#define SPIC_DS 0x4000 #define SPIC_DS 0x4000
#define ICH7_REG_SPIA 0x04 /* 32 Bits */ #define ICH7_REG_SPIA 0x04 /* 32 Bits */
#define ICH7_REG_SPID0 0x08 /* 64 Bytes */ #define ICH7_REG_SPID0 0x08 /* 64 Bytes */
#define ICH7_REG_PREOP 0x54 /* 16 Bits */ #define ICH7_REG_PREOP 0x54 /* 16 Bits */
#define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ #define ICH7_REG_OPTYPE 0x56 /* 16 Bits */
#define ICH7_REG_OPMENU 0x58 /* 64 Bits */ #define ICH7_REG_OPMENU 0x58 /* 64 Bits */
/* ICH SPI configuration lock-down. May be set during chipset enabling. */ /* ICH SPI configuration lock-down. May be set during chipset enabling. */
static int ichspi_lock = 0; static int ichspi_lock = 0;
@ -597,7 +601,7 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset,
- waiting for the busy bit (WIP) to be cleared - waiting for the busy bit (WIP) to be cleared
This means the timeout must be sufficient for chip erase This means the timeout must be sufficient for chip erase
of slow high-capacity chips. of slow high-capacity chips.
*/ */
switch (op.atomic) { switch (op.atomic) {
case 2: case 2:
/* Select second preop. */ /* Select second preop. */
@ -703,7 +707,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
/* Assemble SSFS + SSFC */ /* Assemble SSFS + SSFC */
temp32 = REGREAD32(ICH9_REG_SSFS); temp32 = REGREAD32(ICH9_REG_SSFS);
/* keep reserved bits */ /* Keep reserved bits only */
temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK;
/* clear error status registers */ /* clear error status registers */
temp32 |= (SSFS_CDS + SSFS_FCERR); temp32 |= (SSFS_CDS + SSFS_FCERR);
@ -712,6 +716,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
/* Use 20 MHz */ /* Use 20 MHz */
temp32 |= SSFC_SCF_20MHZ; temp32 |= SSFC_SCF_20MHZ;
/* Set data byte count (DBC) and data cycle bit (DS) */
if (datalength != 0) { if (datalength != 0) {
uint32_t datatemp; uint32_t datatemp;
temp32 |= SSFC_DS; temp32 |= SSFC_DS;
@ -742,7 +747,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
- waiting for the busy bit (WIP) to be cleared - waiting for the busy bit (WIP) to be cleared
This means the timeout must be sufficient for chip erase This means the timeout must be sufficient for chip erase
of slow high-capacity chips. of slow high-capacity chips.
*/ */
switch (op.atomic) { switch (op.atomic) {
case 2: case 2:
/* Select second preop. */ /* Select second preop. */

2
print.c
View File

@ -100,7 +100,7 @@ static void print_supported_chips(void)
for (i = strlen("Device"); i < maxchiplen; i++) for (i = strlen("Device"); i < maxchiplen; i++)
printf(" "); printf(" ");
printf("Tested Known Size/KB: Type:\n"); printf("Tested Known Size/kB: Type:\n");
for (i = 0; i < okcol; i++) for (i = 0; i < okcol; i++)
printf(" "); printf(" ");
printf("OK Broken\n\n"); printf("OK Broken\n\n");

2
print_wiki.c
View File

@ -59,7 +59,7 @@ mainboards on the [[Mailinglist|mailing list]].\n";
static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \
valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
! align=\"left\" | Device\n! align=\"left\" | Size / KB\n\ ! align=\"left\" | Device\n! align=\"left\" | Size / kB\n\
! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ ! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\
|- bgcolor=\"#6699ff\"\n| colspan=\"4\" | &nbsp;\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" | &nbsp;\n\
| Probe\n| Read\n| Erase\n| Write\n\n"; | Probe\n| Read\n| Erase\n| Write\n\n";

6
util/flashrom_partial_write_test.sh
View File

@ -18,8 +18,8 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
# #
# This script attempts to test Flashrom partial write capability by writing # This script attempts to test Flashrom partial write capability by writing
# patterns of 0xff and 0x00 bytes to the lowest 128KB of flash. 128KB is chosen # patterns of 0xff and 0x00 bytes to the lowest 128kB of flash. 128kB is chosen
# since 64KB is usually the largest possible block size, so we will try to # since 64kB is usually the largest possible block size, so we will try to
# cover at least two blocks with this test. # cover at least two blocks with this test.
EXIT_SUCCESS=0 EXIT_SUCCESS=0
@ -197,7 +197,7 @@ done
# 2. The old content must be restored at unspecified offsets. # 2. The old content must be restored at unspecified offsets.
# 3. The new content must be written at specified offsets. # 3. The new content must be written at specified offsets.
# #
# Note: The last chunk of 0xff bytes is only 2K as to avoid overrunning a 128KB # Note: The last chunk of 0xff bytes is only 2k as to avoid overrunning a 128kB
# test image. # test image.
# #
echo " echo "

2
wbsio_spi.c
View File

@ -84,7 +84,7 @@ int wbsio_check_for_spi(void)
register_spi_programmer(&spi_programmer_wbsio); register_spi_programmer(&spi_programmer_wbsio);
msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
"1024 KB!\n", __func__); "1024 kB!\n", __func__);
max_rom_decode.spi = 1024 * 1024; max_rom_decode.spi = 1024 * 1024;
return 0; return 0;