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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00

Skip all delays in probe_jedec() if probe_delay is 0

Probe_jedec() checks the delay value and issues programmer_delay based
on the value except for delays between single chip_writeb. If a chip has
zero probe_delay, delays between chip_writeb should be skipped as well.

Corresponding to flashrom svn r805.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
Sean Nelson 2009-12-17 04:22:40 +00:00 committed by Carl-Daniel Hailfinger
parent d3abc651bc
commit c12fc71f74

View File

@ -96,10 +96,13 @@ int probe_jedec(struct flashchip *flash)
/* Issue JEDEC Product ID Entry command */
chip_writeb(0xAA, bios + 0x5555);
if (probe_timing_enter)
programmer_delay(10);
chip_writeb(0x55, bios + 0x2AAA);
if (probe_timing_enter)
programmer_delay(10);
chip_writeb(0x90, bios + 0x5555);
if (probe_timing_enter)
programmer_delay(probe_timing_enter);
/* Read product ID */
@ -122,10 +125,13 @@ int probe_jedec(struct flashchip *flash)
/* Issue JEDEC Product ID Exit command */
chip_writeb(0xAA, bios + 0x5555);
if (probe_timing_exit)
programmer_delay(10);
chip_writeb(0x55, bios + 0x2AAA);
if (probe_timing_exit)
programmer_delay(10);
chip_writeb(0xF0, bios + 0x5555);
if (probe_timing_exit)
programmer_delay(probe_timing_exit);
printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);