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https://review.coreboot.org/flashrom.git
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Cosmetics and small coding style fixes
Also, introduce BITMODE_BITBANG_SPI to eliminate a magic value. Corresponding to flashrom svn r742. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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@ -563,12 +563,12 @@ int erase_flash(struct flashchip *flash)
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return ret;
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return ret;
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}
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}
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void emergency_help_message()
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void emergency_help_message(void)
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{
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{
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fprintf(stderr, "Your flash chip is in an unknown state.\n"
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fprintf(stderr, "Your flash chip is in an unknown state.\n"
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"Get help on IRC at irc.freenode.net channel #flashrom or\n"
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"Get help on IRC at irc.freenode.net (channel #flashrom) or\n"
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"mail flashrom@flashrom.org\n"
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"mail flashrom@flashrom.org!\n--------------------"
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"------------------------------------------------------------\n"
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"-----------------------------------------------------------\n"
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"DO NOT REBOOT OR POWEROFF!\n");
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"DO NOT REBOOT OR POWEROFF!\n");
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}
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}
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72
ft2232_spi.c
72
ft2232_spi.c
@ -29,15 +29,20 @@
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#include "spi.h"
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#include "spi.h"
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#include <ftdi.h>
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#include <ftdi.h>
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/* the 'H' chips can run internally at either 12Mhz or 60Mhz.
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/*
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* the non-H chips can only run at 12Mhz. */
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* The 'H' chips can run internally at either 12MHz or 60MHz.
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* The non-H chips can only run at 12MHz.
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*/
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#define CLOCK_5X 1
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#define CLOCK_5X 1
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/* in either case, the divisor is a simple integer clock divider.
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/*
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* if CLOCK_5X is set, this divisor divides 30Mhz, else it
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* In either case, the divisor is a simple integer clock divider.
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* divides 6Mhz */
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* If CLOCK_5X is set, this divisor divides 30MHz, else it divides 6MHz.
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#define DIVIDE_BY 3 // e.g. '3' will give either 10Mhz or 2Mhz spi clock
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*/
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#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
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#define BITMODE_BITBANG_NORMAL 1
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#define BITMODE_BITBANG_SPI 2
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static struct ftdi_context ftdic_context;
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static struct ftdi_context ftdic_context;
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@ -76,7 +81,7 @@ int ft2232_spi_init(void)
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if (ftdi_init(ftdic) < 0) {
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if (ftdi_init(ftdic) < 0) {
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fprintf(stderr, "ftdi_init failed\n");
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fprintf(stderr, "ftdi_init failed\n");
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return EXIT_FAILURE;
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return EXIT_FAILURE; // TODO
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}
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}
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if (programmer_param && !strlen(programmer_param)) {
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if (programmer_param && !strlen(programmer_param)) {
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@ -113,9 +118,9 @@ int ft2232_spi_init(void)
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f = ftdi_usb_open(ftdic, 0x0403, ft2232_type);
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f = ftdi_usb_open(ftdic, 0x0403, ft2232_type);
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if (f < 0 && f != -5) {
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if (f < 0 && f != -5) {
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fprintf(stderr, "Unable to open ftdi device: %d (%s)\n", f,
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fprintf(stderr, "Unable to open FTDI device: %d (%s)\n", f,
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ftdi_get_error_string(ftdic));
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ftdi_get_error_string(ftdic));
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exit(-1);
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exit(-1); // TODO
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}
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}
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if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
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if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
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@ -124,7 +129,7 @@ int ft2232_spi_init(void)
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}
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}
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if (ftdi_usb_reset(ftdic) < 0) {
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if (ftdi_usb_reset(ftdic) < 0) {
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fprintf(stderr, "Unable to reset ftdi device\n");
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fprintf(stderr, "Unable to reset FTDI device\n");
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}
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}
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if (ftdi_set_latency_timer(ftdic, 2) < 0) {
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if (ftdi_set_latency_timer(ftdic, 2) < 0) {
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@ -135,13 +140,13 @@ int ft2232_spi_init(void)
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fprintf(stderr, "Unable to set chunk size\n");
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fprintf(stderr, "Unable to set chunk size\n");
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}
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}
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if (ftdi_set_bitmode(ftdic, 0x00, 2) < 0) {
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if (ftdi_set_bitmode(ftdic, 0x00, BITMODE_BITBANG_SPI) < 0) {
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fprintf(stderr, "Unable to set bitmode\n");
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fprintf(stderr, "Unable to set bitmode to SPI\n");
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}
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}
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#if CLOCK_5X
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#if CLOCK_5X
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printf_debug("Disable divide-by-5 front stage\n");
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printf_debug("Disable divide-by-5 front stage\n");
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buf[0] = 0x8a; /* disable divide-by-5 */
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buf[0] = 0x8a; /* Disable divide-by-5. */
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if (send_buf(ftdic, buf, 1))
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if (send_buf(ftdic, buf, 1))
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return -1;
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return -1;
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#define MPSSE_CLK 60.0
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#define MPSSE_CLK 60.0
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@ -154,16 +159,16 @@ int ft2232_spi_init(void)
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printf_debug("Set clock divisor\n");
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printf_debug("Set clock divisor\n");
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buf[0] = 0x86; /* command "set divisor" */
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buf[0] = 0x86; /* command "set divisor" */
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/* valueL/valueH are (desired_divisor - 1) */
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/* valueL/valueH are (desired_divisor - 1) */
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buf[1] = (DIVIDE_BY-1) & 0xff;
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buf[1] = (DIVIDE_BY - 1) & 0xff;
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buf[2] = ((DIVIDE_BY-1) >> 8) & 0xff;
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buf[2] = ((DIVIDE_BY - 1) >> 8) & 0xff;
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if (send_buf(ftdic, buf, 3))
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if (send_buf(ftdic, buf, 3))
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return -1;
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return -1;
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printf("SPI clock is %fMHz\n",
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printf("SPI clock is %fMHz\n",
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(double)(MPSSE_CLK / (((DIVIDE_BY-1) + 1) * 2)));
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(double)(MPSSE_CLK / (((DIVIDE_BY - 1) + 1) * 2)));
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/* Disconnect TDI/DO to TDO/DI for Loopback */
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/* Disconnect TDI/DO to TDO/DI for loopback. */
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printf_debug("No loopback of tdi/do tdo/di\n");
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printf_debug("No loopback of TDI/DO TDO/DI\n");
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buf[0] = 0x85;
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buf[0] = 0x85;
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if (send_buf(ftdic, buf, 1))
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if (send_buf(ftdic, buf, 1))
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return -1;
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return -1;
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@ -180,7 +185,7 @@ int ft2232_spi_init(void)
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if (send_buf(ftdic, buf, 3))
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if (send_buf(ftdic, buf, 3))
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return -1;
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return -1;
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printf_debug("\nft2232 chosen\n");
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// printf_debug("\nft2232 chosen\n");
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buses_supported = CHIP_BUSTYPE_SPI;
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buses_supported = CHIP_BUSTYPE_SPI;
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spi_controller = SPI_CONTROLLER_FT2232;
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spi_controller = SPI_CONTROLLER_FT2232;
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@ -193,7 +198,7 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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{
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{
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struct ftdi_context *ftdic = &ftdic_context;
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struct ftdi_context *ftdic = &ftdic_context;
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static unsigned char *buf = NULL;
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static unsigned char *buf = NULL;
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int i, ret = 0;
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int i = 0, ret = 0;
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if (writecnt > 65536 || readcnt > 65536)
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if (writecnt > 65536 || readcnt > 65536)
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return SPI_INVALID_LENGTH;
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return SPI_INVALID_LENGTH;
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@ -201,15 +206,13 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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buf = realloc(buf, writecnt + readcnt + 100);
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buf = realloc(buf, writecnt + readcnt + 100);
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if (!buf) {
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if (!buf) {
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fprintf(stderr, "Out of memory!\n");
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fprintf(stderr, "Out of memory!\n");
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exit(1);
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exit(1); // -1
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}
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}
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i = 0;
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/*
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* Minimize USB transfers by packing as many commands as possible
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/* minimize USB transfers by packing as many commands
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* together. If we're not expecting to read, we can assert CS#, write,
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* as possible together. if we're not expecting to
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* and deassert CS# all in one shot. If reading, we do three separate
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* read, we can assert CS, write, and deassert CS all
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* in one shot. if reading, we do three separate
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* operations.
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* operations.
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*/
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*/
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printf_debug("Assert CS#\n");
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printf_debug("Assert CS#\n");
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@ -221,11 +224,12 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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buf[i++] = 0x11;
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buf[i++] = 0x11;
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buf[i++] = (writecnt - 1) & 0xff;
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buf[i++] = (writecnt - 1) & 0xff;
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buf[i++] = ((writecnt - 1) >> 8) & 0xff;
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buf[i++] = ((writecnt - 1) >> 8) & 0xff;
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memcpy(buf+i, writearr, writecnt);
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memcpy(buf + i, writearr, writecnt);
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i += writecnt;
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i += writecnt;
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}
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}
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/* optionally terminate this batch of commands with a
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/*
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* Optionally terminate this batch of commands with a
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* read command, then do the fetch of the results.
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* read command, then do the fetch of the results.
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*/
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*/
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if (readcnt) {
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if (readcnt) {
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@ -235,13 +239,13 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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ret = send_buf(ftdic, buf, i);
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ret = send_buf(ftdic, buf, i);
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i = 0;
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i = 0;
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if (ret == 0) {
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if (ret == 0) {
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/* FIXME: This is unreliable. There's no guarantee that we read
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/*
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* the response directly after sending the read command.
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* FIXME: This is unreliable. There's no guarantee that
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* We may be scheduled out etc.
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* we read the response directly after sending the read
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* command. We may be scheduled out etc.
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*/
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*/
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ret = get_buf(ftdic, readarr, readcnt);
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ret = get_buf(ftdic, readarr, readcnt);
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}
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}
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}
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}
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printf_debug("De-assert CS#\n");
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printf_debug("De-assert CS#\n");
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@ -266,7 +270,7 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
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int i;
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int i;
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spi_disable_blockprotect();
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spi_disable_blockprotect();
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/* Erase first */
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/* Erase first. */
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printf("Erasing flash before programming... ");
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printf("Erasing flash before programming... ");
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if (erase_flash(flash)) {
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if (erase_flash(flash)) {
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fprintf(stderr, "ERASE FAILED!\n");
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fprintf(stderr, "ERASE FAILED!\n");
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