mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 22:52:34 +02:00
Introduce msg_*warn
Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Corresponding to flashrom svn r1643. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
parent
5561955b11
commit
c6fa32d2b5
@ -546,7 +546,7 @@ void w83697xx_memw_enable(uint16_t port)
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sio_mask(port, 0x24, 0x28, 0x38);
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} else {
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msg_perr("WARNING: Flash interface in use by GPIO!\n");
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msg_pwarn("Warning: Flash interface in use by GPIO!\n");
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}
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} else {
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msg_pinfo("BIOS ROM is disabled\n");
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@ -2556,7 +2556,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas
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if (board->dmi_pattern) {
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if (!has_dmi_support) {
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msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n",
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msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n",
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board->vendor_name, board->board_name);
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msg_pinfo("Please supply the board vendor and model name with the "
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"-p internal:mainboard=<vendor>:<model> option.\n");
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@ -2582,14 +2582,14 @@ static int board_enable_safetycheck(const struct board_match *board)
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return 0;
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if (!force_boardenable) {
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msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n"
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msg_pwarn("Warning: The mainboard-specific code for %s %s has not been tested,\n"
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"and thus will not be executed by default. Depending on your hardware,\n"
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"erasing, writing or even probing can fail without running this code.\n\n"
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"Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n"
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"\"internal programmer\") for details.\n", board->vendor_name, board->board_name);
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return 1;
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}
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msg_pinfo("NOTE: Running an untested board enable procedure.\n"
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msg_pwarn("NOTE: Running an untested board enable procedure.\n"
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"Please report success/failure to flashrom@flashrom.org.\n");
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return 0;
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}
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@ -96,7 +96,7 @@ int cb_check_image(uint8_t *image, int size)
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if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) {
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msg_pdbg2("This coreboot image matches this mainboard.\n");
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} else {
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msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n"
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msg_perr("This coreboot image (%s:%s) does not appear to\n"
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"be correct for the detected mainboard (%s:%s).\n",
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image_vendor, image_model, cb_vendor, cb_model);
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return -1;
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@ -300,11 +300,11 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_
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msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis");
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msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis");
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if (new & (1 << 5))
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msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n");
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msg_pwarn("Warning: BIOS region SMM protection is enabled!\n");
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if (new != wanted)
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msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n"
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msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n"
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"New value is 0x%02x.\n", bios_cntl, old, wanted, name, new);
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/* Return an error if we could not set the write enable */
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@ -661,7 +661,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
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rpci_write_byte(dev, 0x40, val);
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if (pci_read_byte(dev, 0x40) != val) {
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msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name);
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msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name);
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return -1;
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}
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@ -1516,7 +1516,7 @@ int chipset_flash_enable(void)
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if (!dev)
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continue;
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if (ret != -2) {
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msg_pinfo("WARNING: unexpected second chipset match: "
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msg_pwarn("Warning: unexpected second chipset match: "
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"\"%s %s\"\n"
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"ignoring, please report lspci and board URL "
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"to flashrom@flashrom.org\n"
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@ -74,16 +74,15 @@ int print(enum msglevel level, const char *fmt, ...)
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int ret = 0;
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FILE *output_type = stdout;
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if (level == MSG_ERROR)
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if (level < MSG_INFO)
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output_type = stderr;
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if (level <= verbose_screen) {
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va_start(ap, fmt);
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ret = vfprintf(output_type, fmt, ap);
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va_end(ap);
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/* msg_*spew usually happens inside chip accessors in possibly
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* time-critical operations. Don't slow them down by flushing.
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*/
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/* msg_*spew often happens inside chip accessors in possibly
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* time-critical operations. Don't slow them down by flushing. */
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if (level != MSG_SPEW)
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fflush(output_type);
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}
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10
dmi.c
10
dmi.c
@ -105,7 +105,7 @@ static char *get_dmi_string(const char *string_name)
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"%s -s %s", dmidecode_command, string_name);
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dmidecode_pipe = popen(commandline, "r");
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if (!dmidecode_pipe) {
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msg_perr("DMI pipe open error\n");
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msg_perr("Opening DMI pipe failed!\n");
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return NULL;
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}
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@ -127,13 +127,11 @@ static char *get_dmi_string(const char *string_name)
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}
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} while (answerbuf[0] == '#');
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/* Toss all output above DMI_MAX_ANSWER_LEN away to prevent
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deadlock on pclose. */
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/* Discard all output exceeding DMI_MAX_ANSWER_LEN to prevent deadlock on pclose. */
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while (!feof(dmidecode_pipe))
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getc(dmidecode_pipe);
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if (pclose(dmidecode_pipe) != 0) {
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msg_pinfo("dmidecode execution unsuccessful - continuing "
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"without DMI info\n");
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msg_pwarn("dmidecode execution unsuccessful - continuing without DMI info\n");
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return NULL;
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}
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@ -144,7 +142,7 @@ static char *get_dmi_string(const char *string_name)
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result = strdup(answerbuf);
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if (!result)
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msg_perr("WARNING: Out of memory - DMI support fails");
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msg_pwarn("Warning: Out of memory - DMI support fails");
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return result;
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}
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12
flash.h
12
flash.h
@ -271,16 +271,20 @@ void start_logging(void);
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#endif
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enum msglevel {
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MSG_ERROR = 0,
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MSG_INFO = 1,
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MSG_DEBUG = 2,
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MSG_DEBUG2 = 3,
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MSG_SPEW = 4,
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MSG_WARN = 1,
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MSG_INFO = 2,
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MSG_DEBUG = 3,
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MSG_DEBUG2 = 4,
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MSG_SPEW = 5,
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};
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/* Let gcc and clang check for correct printf-style format strings. */
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int print(enum msglevel level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
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#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
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#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
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#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
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#define msg_gwarn(...) print(MSG_WARN, __VA_ARGS__) /* general warnings */
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#define msg_pwarn(...) print(MSG_WARN, __VA_ARGS__) /* programmer warnings */
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#define msg_cwarn(...) print(MSG_WARN, __VA_ARGS__) /* chip warnings */
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#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
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#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
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#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
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10
ichspi.c
10
ichspi.c
@ -1455,7 +1455,7 @@ static int ich9_handle_frap(uint32_t frap, int i)
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return 0;
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}
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msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i,
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msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i,
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region_names[i], base, (limit | 0x0fff),
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access_names[rwperms]);
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return 1;
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@ -1486,7 +1486,7 @@ static int ich9_handle_pr(int i)
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}
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msg_pdbg("0x%02X: 0x%08x ", off, pr);
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msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
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msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
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ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
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return 1;
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}
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@ -1618,7 +1618,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
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mmio_readl(ich_spibar + offs), i);
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}
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if (mmio_readw(ich_spibar) & (1 << 15)) {
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msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
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msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n");
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ichspi_lock = 1;
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}
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ich_init_opcodes();
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@ -1669,7 +1669,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
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msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
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prettyprint_ich9_reg_hsfs(tmp2);
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if (tmp2 & HSFS_FLOCKDN) {
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msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
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msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
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ichspi_lock = 1;
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}
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if (tmp2 & HSFS_FDV)
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@ -1879,7 +1879,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base)
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msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n",
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mmio_readw(ich_spibar + 0x6c));
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if (mmio_readw(ich_spibar) & (1 << 15)) {
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msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
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msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
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ichspi_lock = 1;
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}
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@ -257,7 +257,7 @@ int internal_init(void)
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#if defined(__i386__) || defined(__x86_64__)
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if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) {
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if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) {
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msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n"
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msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n"
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" match the current coreboot IDs of the mainboard (%s:%s).\n",
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board_vendor, board_model, cb_vendor, cb_model);
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if (!force_boardmismatch)
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@ -98,7 +98,7 @@ int satasii_init(void)
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/* Check if ROM cycle are OK. */
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if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
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msg_pinfo("Warning: Flash seems unconnected.\n");
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msg_pwarn("Warning: Flash seems unconnected.\n");
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if (register_shutdown(satasii_shutdown, NULL))
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return 1;
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18
serprog.c
18
serprog.c
@ -467,7 +467,7 @@ int serprog_init(void)
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* in a single byte.
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*/
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if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) {
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msg_perr("Warning: NAK to query supported buses\n");
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msg_pwarn("Warning: NAK to query supported buses\n");
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c = BUS_NONSPI; /* A reasonable default for now. */
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}
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serprog_buses_supported = c;
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@ -547,9 +547,8 @@ int serprog_init(void)
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buf[3] = (f_spi_req >> (3 * 8)) & 0xFF;
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if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0)
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msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n");
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else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf)
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== 0) {
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msg_pwarn(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n");
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else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) == 0) {
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f_spi = buf[0];
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f_spi |= buf[1] << (1 * 8);
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f_spi |= buf[2] << (2 * 8);
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@ -557,7 +556,7 @@ int serprog_init(void)
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msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. "
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"It was actually set to %u Hz\n", f_spi_req, f_spi);
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} else
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msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req);
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msg_pwarn(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req);
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}
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free(spispeed);
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bt = serprog_buses_supported;
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@ -633,14 +632,14 @@ int serprog_init(void)
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}
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if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) {
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msg_perr("Warning: NAK to query programmer name\n");
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msg_pwarn("Warning: NAK to query programmer name\n");
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strcpy((char *)pgmname, "(unknown)");
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}
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pgmname[16] = 0;
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msg_pinfo(MSGHEADER "Programmer name is \"%s\"\n", pgmname);
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if (sp_docommand(S_CMD_Q_SERBUF, 0, NULL, 2, &sp_device_serbuf_size)) {
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msg_perr("Warning: NAK to query serial buffer size\n");
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msg_pwarn("Warning: NAK to query serial buffer size\n");
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}
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msg_pdbg(MSGHEADER "Serial buffer size is %d\n",
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sp_device_serbuf_size);
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@ -660,8 +659,7 @@ int serprog_init(void)
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if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2,
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&sp_device_opbuf_size)) {
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msg_perr("Warning: NAK to query operation buffer "
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"size\n");
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msg_pwarn("Warning: NAK to query operation buffer size\n");
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}
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msg_pdbg(MSGHEADER "operation buffer size is %d\n",
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sp_device_opbuf_size);
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@ -755,7 +753,7 @@ static int serprog_shutdown(void *data)
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if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0)
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msg_pdbg(MSGHEADER "Output drivers disabled\n");
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else
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msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__);
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msg_pwarn(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__);
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}
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/* FIXME: fix sockets on windows(?), especially closing */
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serialport_shutdown(&sp_fd);
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@ -86,7 +86,7 @@ int unlock_sst_fwhub(struct flashctx *flash)
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{
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if (clear_sst_fwhub_block_lock(flash, i))
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{
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msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i);
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msg_cwarn("Warning: Unlock Failed for block 0x%06x\n", i);
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ret++;
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}
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}
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