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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

Introduce msg_*warn

Also, unify all outputs of "Warning:" and "Error:" to use normal
capitalization instead of mixing it with all capitals.

Corresponding to flashrom svn r1643.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
Stefan Tauner 2013-01-04 22:54:07 +00:00
parent 5561955b11
commit c6fa32d2b5
11 changed files with 43 additions and 44 deletions

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@ -546,7 +546,7 @@ void w83697xx_memw_enable(uint16_t port)
sio_mask(port, 0x24, 0x28, 0x38);
} else {
msg_perr("WARNING: Flash interface in use by GPIO!\n");
msg_pwarn("Warning: Flash interface in use by GPIO!\n");
}
} else {
msg_pinfo("BIOS ROM is disabled\n");
@ -2556,7 +2556,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas
if (board->dmi_pattern) {
if (!has_dmi_support) {
msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n",
msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n",
board->vendor_name, board->board_name);
msg_pinfo("Please supply the board vendor and model name with the "
"-p internal:mainboard=<vendor>:<model> option.\n");
@ -2582,14 +2582,14 @@ static int board_enable_safetycheck(const struct board_match *board)
return 0;
if (!force_boardenable) {
msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n"
msg_pwarn("Warning: The mainboard-specific code for %s %s has not been tested,\n"
"and thus will not be executed by default. Depending on your hardware,\n"
"erasing, writing or even probing can fail without running this code.\n\n"
"Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n"
"\"internal programmer\") for details.\n", board->vendor_name, board->board_name);
return 1;
}
msg_pinfo("NOTE: Running an untested board enable procedure.\n"
msg_pwarn("NOTE: Running an untested board enable procedure.\n"
"Please report success/failure to flashrom@flashrom.org.\n");
return 0;
}

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@ -96,8 +96,8 @@ int cb_check_image(uint8_t *image, int size)
if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) {
msg_pdbg2("This coreboot image matches this mainboard.\n");
} else {
msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n"
" be correct for the detected mainboard (%s:%s).\n",
msg_perr("This coreboot image (%s:%s) does not appear to\n"
"be correct for the detected mainboard (%s:%s).\n",
image_vendor, image_model, cb_vendor, cb_model);
return -1;
}

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@ -300,11 +300,11 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_
msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis");
msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis");
if (new & (1 << 5))
msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n");
msg_pwarn("Warning: BIOS region SMM protection is enabled!\n");
if (new != wanted)
msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n"
msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n"
"New value is 0x%02x.\n", bios_cntl, old, wanted, name, new);
/* Return an error if we could not set the write enable */
@ -661,7 +661,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
rpci_write_byte(dev, 0x40, val);
if (pci_read_byte(dev, 0x40) != val) {
msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name);
msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name);
return -1;
}
@ -1516,7 +1516,7 @@ int chipset_flash_enable(void)
if (!dev)
continue;
if (ret != -2) {
msg_pinfo("WARNING: unexpected second chipset match: "
msg_pwarn("Warning: unexpected second chipset match: "
"\"%s %s\"\n"
"ignoring, please report lspci and board URL "
"to flashrom@flashrom.org\n"

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@ -74,16 +74,15 @@ int print(enum msglevel level, const char *fmt, ...)
int ret = 0;
FILE *output_type = stdout;
if (level == MSG_ERROR)
if (level < MSG_INFO)
output_type = stderr;
if (level <= verbose_screen) {
va_start(ap, fmt);
ret = vfprintf(output_type, fmt, ap);
va_end(ap);
/* msg_*spew usually happens inside chip accessors in possibly
* time-critical operations. Don't slow them down by flushing.
*/
/* msg_*spew often happens inside chip accessors in possibly
* time-critical operations. Don't slow them down by flushing. */
if (level != MSG_SPEW)
fflush(output_type);
}

10
dmi.c
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@ -105,7 +105,7 @@ static char *get_dmi_string(const char *string_name)
"%s -s %s", dmidecode_command, string_name);
dmidecode_pipe = popen(commandline, "r");
if (!dmidecode_pipe) {
msg_perr("DMI pipe open error\n");
msg_perr("Opening DMI pipe failed!\n");
return NULL;
}
@ -127,13 +127,11 @@ static char *get_dmi_string(const char *string_name)
}
} while (answerbuf[0] == '#');
/* Toss all output above DMI_MAX_ANSWER_LEN away to prevent
deadlock on pclose. */
/* Discard all output exceeding DMI_MAX_ANSWER_LEN to prevent deadlock on pclose. */
while (!feof(dmidecode_pipe))
getc(dmidecode_pipe);
if (pclose(dmidecode_pipe) != 0) {
msg_pinfo("dmidecode execution unsuccessful - continuing "
"without DMI info\n");
msg_pwarn("dmidecode execution unsuccessful - continuing without DMI info\n");
return NULL;
}
@ -144,7 +142,7 @@ static char *get_dmi_string(const char *string_name)
result = strdup(answerbuf);
if (!result)
msg_perr("WARNING: Out of memory - DMI support fails");
msg_pwarn("Warning: Out of memory - DMI support fails");
return result;
}

12
flash.h
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@ -271,16 +271,20 @@ void start_logging(void);
#endif
enum msglevel {
MSG_ERROR = 0,
MSG_INFO = 1,
MSG_DEBUG = 2,
MSG_DEBUG2 = 3,
MSG_SPEW = 4,
MSG_WARN = 1,
MSG_INFO = 2,
MSG_DEBUG = 3,
MSG_DEBUG2 = 4,
MSG_SPEW = 5,
};
/* Let gcc and clang check for correct printf-style format strings. */
int print(enum msglevel level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
#define msg_gwarn(...) print(MSG_WARN, __VA_ARGS__) /* general warnings */
#define msg_pwarn(...) print(MSG_WARN, __VA_ARGS__) /* programmer warnings */
#define msg_cwarn(...) print(MSG_WARN, __VA_ARGS__) /* chip warnings */
#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */

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@ -1455,7 +1455,7 @@ static int ich9_handle_frap(uint32_t frap, int i)
return 0;
}
msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i,
msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i,
region_names[i], base, (limit | 0x0fff),
access_names[rwperms]);
return 1;
@ -1486,7 +1486,7 @@ static int ich9_handle_pr(int i)
}
msg_pdbg("0x%02X: 0x%08x ", off, pr);
msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
return 1;
}
@ -1618,7 +1618,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
mmio_readl(ich_spibar + offs), i);
}
if (mmio_readw(ich_spibar) & (1 << 15)) {
msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n");
ichspi_lock = 1;
}
ich_init_opcodes();
@ -1669,7 +1669,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
prettyprint_ich9_reg_hsfs(tmp2);
if (tmp2 & HSFS_FLOCKDN) {
msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
ichspi_lock = 1;
}
if (tmp2 & HSFS_FDV)
@ -1879,7 +1879,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base)
msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n",
mmio_readw(ich_spibar + 0x6c));
if (mmio_readw(ich_spibar) & (1 << 15)) {
msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
ichspi_lock = 1;
}

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@ -257,7 +257,7 @@ int internal_init(void)
#if defined(__i386__) || defined(__x86_64__)
if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) {
if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) {
msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n"
msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n"
" match the current coreboot IDs of the mainboard (%s:%s).\n",
board_vendor, board_model, cb_vendor, cb_model);
if (!force_boardmismatch)

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@ -98,7 +98,7 @@ int satasii_init(void)
/* Check if ROM cycle are OK. */
if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
msg_pinfo("Warning: Flash seems unconnected.\n");
msg_pwarn("Warning: Flash seems unconnected.\n");
if (register_shutdown(satasii_shutdown, NULL))
return 1;

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@ -467,7 +467,7 @@ int serprog_init(void)
* in a single byte.
*/
if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) {
msg_perr("Warning: NAK to query supported buses\n");
msg_pwarn("Warning: NAK to query supported buses\n");
c = BUS_NONSPI; /* A reasonable default for now. */
}
serprog_buses_supported = c;
@ -547,9 +547,8 @@ int serprog_init(void)
buf[3] = (f_spi_req >> (3 * 8)) & 0xFF;
if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0)
msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n");
else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf)
== 0) {
msg_pwarn(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n");
else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) == 0) {
f_spi = buf[0];
f_spi |= buf[1] << (1 * 8);
f_spi |= buf[2] << (2 * 8);
@ -557,7 +556,7 @@ int serprog_init(void)
msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. "
"It was actually set to %u Hz\n", f_spi_req, f_spi);
} else
msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req);
msg_pwarn(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req);
}
free(spispeed);
bt = serprog_buses_supported;
@ -633,14 +632,14 @@ int serprog_init(void)
}
if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) {
msg_perr("Warning: NAK to query programmer name\n");
msg_pwarn("Warning: NAK to query programmer name\n");
strcpy((char *)pgmname, "(unknown)");
}
pgmname[16] = 0;
msg_pinfo(MSGHEADER "Programmer name is \"%s\"\n", pgmname);
if (sp_docommand(S_CMD_Q_SERBUF, 0, NULL, 2, &sp_device_serbuf_size)) {
msg_perr("Warning: NAK to query serial buffer size\n");
msg_pwarn("Warning: NAK to query serial buffer size\n");
}
msg_pdbg(MSGHEADER "Serial buffer size is %d\n",
sp_device_serbuf_size);
@ -660,8 +659,7 @@ int serprog_init(void)
if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2,
&sp_device_opbuf_size)) {
msg_perr("Warning: NAK to query operation buffer "
"size\n");
msg_pwarn("Warning: NAK to query operation buffer size\n");
}
msg_pdbg(MSGHEADER "operation buffer size is %d\n",
sp_device_opbuf_size);
@ -755,7 +753,7 @@ static int serprog_shutdown(void *data)
if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0)
msg_pdbg(MSGHEADER "Output drivers disabled\n");
else
msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__);
msg_pwarn(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__);
}
/* FIXME: fix sockets on windows(?), especially closing */
serialport_shutdown(&sp_fd);

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@ -86,7 +86,7 @@ int unlock_sst_fwhub(struct flashctx *flash)
{
if (clear_sst_fwhub_block_lock(flash, i))
{
msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i);
msg_cwarn("Warning: Unlock Failed for block 0x%06x\n", i);
ret++;
}
}