openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 07:02:34 +02:00
Code Issues Releases Wiki Activity

Add support for BCM HT1000 chipset

Browse Source 
Tested on IBM x3455.

Corresponding to flashrom svn r117 and coreboot v2 svn r2711.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This commit is contained in:
Stefan Reinauer 2007-06-05 10:28:39 +00:00 committed by Stefan Reinauer
parent a88088530e
commit c868b9e68b
1 changed files with 24 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
chipset_enable.c
View File

@ -387,6 +387,28 @@ static int enable_flash_mcp55(struct pci_dev *dev, char *name)
} }
static int enable_flash_ht1000(struct pci_dev *dev, char *name)
{
unsigned char byte;
/* Set the 4MB enable bit */
byte = pci_read_byte(dev, 0x41);
byte |= 0x0e;
pci_write_byte(dev, 0x41, byte);
byte = pci_read_byte(dev, 0x43);
byte |= (1<<4);
pci_write_byte(dev, 0x43, byte);
/* Some magic. Comment me if you can */
outb(0x45, 0xcd6);
byte = inb(0xcd7);
outb(reg8|0x20, 0xcd7);
return 0;
}
typedef struct penable { typedef struct penable {
unsigned short vendor, device; unsigned short vendor, device;
char *name; char *name;
@ -444,6 +466,8 @@ static FLASH_ENABLE enables[] = {
{0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, /* Pro */
{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */ {0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
{0x1166, 0x0205, "BCM HT1000", enable_flash_ht1000},
}; };
/* /*