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Add programmer-specific delay functions
Add external programmer delay functions so external programmers can handle the delay on their own if needed. Corresponding to flashrom svn r578. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Urja Rannikko <urjaman@gmail.com>
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16
spi.c
16
spi.c
@ -425,7 +425,7 @@ int spi_chip_erase_60(struct flashchip *flash)
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*/
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/* FIXME: We assume spi_read_status_register will never fail. */
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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sleep(1);
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programmer_delay(1000 * 1000);
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return 0;
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}
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@ -453,7 +453,7 @@ int spi_chip_erase_c7(struct flashchip *flash)
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*/
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/* FIXME: We assume spi_read_status_register will never fail. */
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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sleep(1);
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programmer_delay(1000 * 1000);
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return 0;
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}
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@ -485,7 +485,7 @@ int spi_block_erase_52(const struct flashchip *flash, unsigned long addr)
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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usleep(100 * 1000);
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programmer_delay(100 * 1000);
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return 0;
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}
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@ -511,7 +511,7 @@ int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr)
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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usleep(100 * 1000);
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programmer_delay(100 * 1000);
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return 0;
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}
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@ -557,7 +557,7 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
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* This usually takes 15-800 ms, so wait in 10 ms steps.
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*/
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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usleep(10 * 1000);
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programmer_delay(10 * 1000);
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return 0;
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}
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@ -690,7 +690,7 @@ int spi_chip_write_1(struct flashchip *flash, uint8_t *buf)
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spi_write_enable();
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spi_byte_program(i, buf[i]);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(10);
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programmer_delay(10);
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}
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return 0;
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@ -748,13 +748,13 @@ int spi_aai_write(struct flashchip *flash, uint8_t *buf)
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return result;
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spi_command(6, 0, w, NULL);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(5); /* SST25VF040B Tbp is max 10us */
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programmer_delay(5); /* SST25VF040B Tbp is max 10us */
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while (pos < size) {
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w[1] = buf[pos++];
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w[2] = buf[pos++];
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spi_command(3, 0, w, NULL);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(5); /* SST25VF040B Tbp is max 10us */
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programmer_delay(5); /* SST25VF040B Tbp is max 10us */
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}
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spi_write_disable();
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return 0;
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