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4BA: Allow disabling 4-byte address mode for SPI flash

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This allows us to support flash chips in any of the following
configurations, regardless of whether the chip powers up in 3-byte or
4-byte address mode.

- standard commands with extended address register (*_4ba_ereg) or
  direct commands (*_4ba_direct) in 3-byte address mode (.set_4ba =
  spi_exit_4ba_*)
- standard commands (*_4ba) or direct commands (*_4ba_direct) in
  4-byte address mode (.set_4ba = spi_enter_4ba_*)
- direct commands (*_4ba_direct) in either address mode (.set_4ba =
  NULL)

Change-Id: I0b25309d731426940fc50956b744b681ab599e87
Signed-off-by: Ed Swierk <eswierk@skyportsystems.com>
Reviewed-on: https://review.coreboot.org/20510
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ed Swierk
2017-07-03 13:17:18 -07:00
committed by Nico Huber
parent d94d254262
commit cc20a9b08e
3 changed files with 10 additions and 46 deletions
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4
flashchips.c
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@ -14597,10 +14597,10 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_DIRECT_READ,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT,
.four_bytes_addr_funcs =
{
.enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */
.set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */
.read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */
.program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */
.program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */