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Code Issues Releases Wiki Activity

spi25_statusreg: Fix checks for FEATURE_WRSR_EXT3

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FEATURE_WRSR_EXT3 contains multiple bits, hence we need to check
for all of them.

Change-Id: I188911890361999cd8cca9b6405f57a91075f6b4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reported-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66712
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Thomas Heijligen <src@posteo.de>
This commit is contained in:
Nico Huber 2022-08-14 11:50:41 +02:00 committed by Thomas Heijligen
parent 99eca0899b
commit cd4a62a784
1 changed files with 3 additions and 2 deletions
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5
spi25_statusreg.c
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@ -93,7 +93,7 @@ int spi_write_register(const struct flashctx *flash, enum flash_reg reg, uint8_t
write_cmd_len = JEDEC_WRSR3_OUTSIZE; write_cmd_len = JEDEC_WRSR3_OUTSIZE;
break; break;
} }
if (feature_bits & FEATURE_WRSR_EXT3) { if ((feature_bits & FEATURE_WRSR_EXT3) == FEATURE_WRSR_EXT3) {
if (spi_prepare_wrsr_ext(write_cmd, &write_cmd_len, flash, reg, value)) if (spi_prepare_wrsr_ext(write_cmd, &write_cmd_len, flash, reg, value))
return 1; return 1;
break; break;
@ -188,7 +188,8 @@ int spi_read_register(const struct flashctx *flash, enum flash_reg reg, uint8_t
msg_cerr("Cannot read SR2: unsupported by chip\n"); msg_cerr("Cannot read SR2: unsupported by chip\n");
return 1; return 1;
case STATUS3: case STATUS3:
if (feature_bits & (FEATURE_WRSR_EXT3 | FEATURE_WRSR3)) { if ((feature_bits & FEATURE_WRSR_EXT3) == FEATURE_WRSR_EXT3
|| (feature_bits & FEATURE_WRSR3)) {
read_cmd = JEDEC_RDSR3; read_cmd = JEDEC_RDSR3;
break; break;
} }