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Add writeprotect support infrastructure
The following just lays out the structure for write protect manipulation of SPI flash chips in Flashrom. We later follow up with adding support for each manufacturer group. BUG=b:153800563 BRANCH=none TEST=builds Change-Id: Id93b5a1cb2da476fa8a7dde41d7b963024117474 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40325 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Edward O'Callaghan

parent
b1f858f65b
commit
d3b6acffe4
4
flash.h
4
flash.h
@ -235,6 +235,8 @@ struct flashchip {
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int (*unlock) (struct flashctx *flash);
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int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
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uint8_t (*read_status) (const struct flashctx *flash);
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int (*write_status) (const struct flashctx *flash, int status);
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struct voltage {
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uint16_t min;
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uint16_t max;
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@ -243,6 +245,8 @@ struct flashchip {
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/* SPI specific options (TODO: Make it a union in case other bustypes get specific options.) */
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uint8_t wrea_override; /**< override opcode for write extended address register */
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struct wp *wp;
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};
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struct flashrom_flashctx {
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