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Add writeprotect support infrastructure

The following just lays out the structure for write protect
manipulation of SPI flash chips in Flashrom. We later follow
up with adding support for each manufacturer group.

BUG=b:153800563
BRANCH=none
TEST=builds

Change-Id: Id93b5a1cb2da476fa8a7dde41d7b963024117474
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40325
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Edward O'Callaghan
2020-09-21 17:10:21 +10:00
committed by Edward O'Callaghan
parent b1f858f65b
commit d3b6acffe4
6 changed files with 602 additions and 2 deletions

View File

@ -235,6 +235,8 @@ struct flashchip {
int (*unlock) (struct flashctx *flash);
int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
uint8_t (*read_status) (const struct flashctx *flash);
int (*write_status) (const struct flashctx *flash, int status);
struct voltage {
uint16_t min;
uint16_t max;
@ -243,6 +245,8 @@ struct flashchip {
/* SPI specific options (TODO: Make it a union in case other bustypes get specific options.) */
uint8_t wrea_override; /**< override opcode for write extended address register */
struct wp *wp;
};
struct flashrom_flashctx {