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Mention a few more flash chip packages in README/manpage

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Corresponding to flashrom svn r427 and coreboot v2 svn r4092.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann
2009-04-11 13:59:00 +00:00
parent a822bd0043
commit d42009c4ae
2 changed files with 8 additions and 6 deletions
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5
README
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@ -5,8 +5,9 @@ Flashrom README
Flashrom is a utility for reading, writing, and erasing flash ROM chips. Flashrom is a utility for reading, writing, and erasing flash ROM chips.
It's often used to flash BIOS/coreboot/firmware images. It's often used to flash BIOS/coreboot/firmware images.
It supports a wide range of DIP32, PLCC32, DIP8, and TSOP chips, which use It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
various protocols such as LPC, FWH, parallel flash, or SPI. TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
or SPI.
(see http://coreboot.org for details on coreboot) (see http://coreboot.org for details on coreboot)

9
flashrom.8
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@ -1,6 +1,6 @@
.TH FLASHROM 8 "January 5, 2009" .TH FLASHROM 8 "April 11, 2009"
.SH NAME .SH NAME
flashrom \- utility for reading, writing, and erasing BIOS/ROM/flash chips flashrom \- read, write, and erase BIOS/ROM/flash chips
.SH SYNOPSIS .SH SYNOPSIS
.B flashrom \fR[\fB\-rwvEVfLhR\fR] [\fB\-c\fR chipname] [\fB\-s\fR exclude_start] [\fB\-e\fR exclude_end] .B flashrom \fR[\fB\-rwvEVfLhR\fR] [\fB\-c\fR chipname] [\fB\-s\fR exclude_start] [\fB\-e\fR exclude_end]
[\fB-m\fR vendor:part] [\fB-l\fR file.layout] [\fB-i\fR image_name] [file] [\fB-m\fR vendor:part] [\fB-l\fR file.layout] [\fB-i\fR image_name] [file]
@ -9,8 +9,9 @@ flashrom \- utility for reading, writing, and erasing BIOS/ROM/flash chips
is a utility for reading, writing, and erasing flash ROM chips. is a utility for reading, writing, and erasing flash ROM chips.
It's often used to flash BIOS/coreboot/firmware images. It's often used to flash BIOS/coreboot/firmware images.
.PP .PP
It supports a wide range of DIP32, PLCC32, DIP8, and TSOP chips, which use It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
various protocols such as LPC, FWH, parallel flash, or SPI. TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
or SPI.
.PP .PP
(see (see
.B http://coreboot.org .B http://coreboot.org