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flashchips,spi25: Replace .wrea_override
with FEATURE_4BA_EAR_1716
There are two competing sets of instructions to access the extended address register of 4BA SPI chips. Some chips even support both sets. So far, we assumed the 0xc5/0xc8 instructions by default and allowed to override the write instructions with the `.wrea_override` field. This has some disadvantages: * The additional field is easily overlooked. So when adding a new flash chip, one might assume only 0xc5/0xc8 are supported. * We cannot describe flash chips completely that allow both instructions (and some programmers may be picky about which instructions can be used). Therefore, replace the `.wrea_override` field with a feature flag. Signed-off-by: Nico Huber <nico.h@gmx.de> Change-Id: I6d82f24898acd0789203516a7456fd785907bc10 Ticket: https://ticket.coreboot.org/issues/357 Reviewed-on: https://review.coreboot.org/c/flashrom/+/64636 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
This commit is contained in:
13
spi25.c
13
spi25.c
@ -351,7 +351,16 @@ static int spi_simple_write_cmd(struct flashctx *const flash, const uint8_t op,
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static int spi_write_extended_address_register(struct flashctx *const flash, const uint8_t regdata)
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{
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const uint8_t op = flash->chip->wrea_override ? : JEDEC_WRITE_EXT_ADDR_REG;
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uint8_t op;
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if (flash->chip->feature_bits & FEATURE_4BA_EAR_C5C8) {
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op = JEDEC_WRITE_EXT_ADDR_REG;
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} else if (flash->chip->feature_bits & FEATURE_4BA_EAR_1716) {
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op = ALT_WRITE_EXT_ADDR_REG_17;
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} else {
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msg_cerr("Flash misses feature flag for extended-address register.\n");
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return -1;
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}
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struct spi_command cmds[] = {
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{
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.readarr = 0,
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@ -394,7 +403,7 @@ static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[],
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cmd_buf[4] = (addr >> 0) & 0xff;
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return 4;
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} else {
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if (flash->chip->feature_bits & FEATURE_4BA_EAR_C5C8) {
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if (flash->chip->feature_bits & FEATURE_4BA_EAR_ANY) {
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if (spi_set_extended_address(flash, addr >> 24))
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return -1;
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} else if (addr >> 24) {
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