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Initial Realtek MST i2c_spi support
This spi master allows for programming of a Realtek RTD2142 MST with external SPI flash chip routed via its internal i2c transport mechanism. BUG=b:152558985,b:148745673 BRANCH=none TEST=echo "00000000:0004ffff fw" > layout && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -r && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -w && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-size && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-name Change-Id: I892e0be776fe605e69fb39c77abf3016591d7123 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40667 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shiyu Sun <sshiyu@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Edward O'Callaghan

parent
3ef0df067b
commit
d97f87b00c
@@ -64,6 +64,7 @@ config_serprog = get_option('config_serprog')
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config_usbblaster_spi = get_option('config_usbblaster_spi')
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config_stlinkv3_spi = get_option('config_stlinkv3_spi')
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config_lspcon_i2c_spi = get_option('config_lspcon_i2c_spi')
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config_realtek_mst_i2c_spi = get_option('config_realtek_mst_i2c_spi')
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cargs = []
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deps = []
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@@ -288,6 +289,10 @@ if config_lspcon_i2c_spi
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srcs += 'lspcon_i2c_spi.c'
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cargs += '-DCONFIG_LSPCON_I2C_SPI=1'
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endif
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if config_realtek_mst_i2c_spi
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srcs += 'realtek_mst_i2c_spi.c'
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cargs += '-DCONFIG_REALTEK_MST_I2C_SPI=1'
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endif
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# bitbanging SPI infrastructure
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if config_bitbang_spi
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