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Code Issues Releases Wiki Activity

Fix several -Wno-implicit-fallthrough warnings

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GCC is picky about the comment being where the break should go.

Change-Id: I05db2fb34025fefe2c6ddd1274c8e45b7cc5a4b6
Signed-off-by: Richard Hughes <richard@hughsie.com>
Reviewed-on: https://review.coreboot.org/c/30406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Richard Hughes
2018-12-19 12:04:30 +00:00
committed by Nico Huber
parent e2cbb12f22
commit db7482bb72
4 changed files with 9 additions and 3 deletions
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5
spi25_statusreg.c
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@ -269,19 +269,22 @@ static void spi_prettyprint_status_register_welwip(uint8_t status)
static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
{
switch (bp) {
/* Fall through. */
case 4:
msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
(status & (1 << 6)) ? "" : "not ");
/* Fall through. */
case 3:
msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
(status & (1 << 5)) ? "" : "not ");
/* Fall through. */
case 2:
msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
(status & (1 << 4)) ? "" : "not ");
/* Fall through. */
case 1:
msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
(status & (1 << 3)) ? "" : "not ");
/* Fall through. */
case 0:
msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
(status & (1 << 2)) ? "" : "not ");