openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00
Code Issues Releases Wiki Activity

Fix several -Wno-implicit-fallthrough warnings

Browse Source 
GCC is picky about the comment being where the break should go.

Change-Id: I05db2fb34025fefe2c6ddd1274c8e45b7cc5a4b6
Signed-off-by: Richard Hughes <richard@hughsie.com>
Reviewed-on: https://review.coreboot.org/c/30406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Richard Hughes 2018-12-19 12:04:30 +00:00 committed by Nico Huber
parent e2cbb12f22
commit db7482bb72
4 changed files with 9 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
ich_descriptors.c
View File

@ -69,6 +69,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c
case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_C620_SERIES_LEWISBURG:
if (cont->NM <= MAX_NUM_MASTERS) if (cont->NM <= MAX_NUM_MASTERS)
return cont->NM; return cont->NM;
break;
default: default:
if (cont->NM < MAX_NUM_MASTERS) if (cont->NM < MAX_NUM_MASTERS)
return cont->NM + 1; return cont->NM + 1;
@ -238,6 +239,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
case CHIPSET_ICH10: case CHIPSET_ICH10:
if (value > 1) if (value > 1)
return "reserved"; return "reserved";
/* Fall through. */
case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_5_SERIES_IBEX_PEAK:
case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_6_SERIES_COUGAR_POINT:
case CHIPSET_7_SERIES_PANTHER_POINT: case CHIPSET_7_SERIES_PANTHER_POINT:

4
ichspi.c
View File

@ -891,7 +891,7 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset,
case 2: case 2:
/* Select second preop. */ /* Select second preop. */
temp16 |= SPIC_SPOP; temp16 |= SPIC_SPOP;
/* And fall through. */ /* Fall through. */
case 1: case 1:
/* Atomic command (preop+op) */ /* Atomic command (preop+op) */
temp16 |= SPIC_ACS; temp16 |= SPIC_ACS;
@ -1013,7 +1013,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
case 2: case 2:
/* Select second preop. */ /* Select second preop. */
temp32 |= SSFC_SPOP; temp32 |= SSFC_SPOP;
/* And fall through. */ /* Fall through. */
case 1: case 1:
/* Atomic command (preop+op) */ /* Atomic command (preop+op) */
temp32 |= SSFC_ACS; temp32 |= SSFC_ACS;

1
sb600spi.c
View File

@ -638,6 +638,7 @@ int sb600_probe_spi(struct pci_dev *dev)
switch (amd_gen) { switch (amd_gen) {
case CHIPSET_SB7XX: case CHIPSET_SB7XX:
msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1);
/* Fall through. */
case CHIPSET_SB89XX: case CHIPSET_SB89XX:
case CHIPSET_HUDSON234: case CHIPSET_HUDSON234:
case CHIPSET_YANGTZE: case CHIPSET_YANGTZE:

5
spi25_statusreg.c
View File

@ -269,19 +269,22 @@ static void spi_prettyprint_status_register_welwip(uint8_t status)
static void spi_prettyprint_status_register_bp(uint8_t status, int bp) static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
{ {
switch (bp) { switch (bp) {
/* Fall through. */
case 4: case 4:
msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n", msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
(status & (1 << 6)) ? "" : "not "); (status & (1 << 6)) ? "" : "not ");
/* Fall through. */
case 3: case 3:
msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
(status & (1 << 5)) ? "" : "not "); (status & (1 << 5)) ? "" : "not ");
/* Fall through. */
case 2: case 2:
msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n", msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
(status & (1 << 4)) ? "" : "not "); (status & (1 << 4)) ? "" : "not ");
/* Fall through. */
case 1: case 1:
msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n", msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
(status & (1 << 3)) ? "" : "not "); (status & (1 << 3)) ? "" : "not ");
/* Fall through. */
case 0: case 0:
msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n", msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
(status & (1 << 2)) ? "" : "not "); (status & (1 << 2)) ? "" : "not ");