From df4c09e3e940f6df187161877d3b2fb8c7725ad0 Mon Sep 17 00:00:00 2001
From: Gerrit Code Review <root@gerrit>
Date: Fri, 17 Apr 2020 00:28:20 +0000
Subject: [PATCH] Update notes for submitted changes

* chipset_enable.c: Disable SPI on ICH7 if booted from LPC
---
 aa/4aa16554c2e9961147cabafc347fc22dbafdc0 | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 aa/4aa16554c2e9961147cabafc347fc22dbafdc0

diff --git a/aa/4aa16554c2e9961147cabafc347fc22dbafdc0 b/aa/4aa16554c2e9961147cabafc347fc22dbafdc0
new file mode 100644
index 000000000..20fa48194
--- /dev/null
+++ b/aa/4aa16554c2e9961147cabafc347fc22dbafdc0
@@ -0,0 +1,7 @@
+Verified+1: build bot (Jenkins) <no-reply@coreboot.org>
+Code-Review+2: HAOUAS Elyes <ehaouas@noos.fr>
+Submitted-by: Angel Pons <th3fanbus@gmail.com>
+Submitted-at: Fri, 17 Apr 2020 00:28:19 +0000
+Reviewed-on: https://review.coreboot.org/c/flashrom/+/40401
+Project: flashrom
+Branch: refs/heads/master