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https://review.coreboot.org/flashrom.git
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Add a bunch of new/tested stuff and various small changes 16
Tested Mainboards: OK: - Acer V75-M (used in IBM Aptiva 2170-G http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - ASRock 4CoreDual-VSTA with W39V040FB http://paste.flashrom.org/view.php?id=1446 - ASRock 775Dual-VSTA http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html - ASRock E350M1/USB3 http://paste.flashrom.org/view.php?id=1465 - ASUS P5B-VM http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html - ASUS SABERTOOTH 990FX R2.0 http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Elitegroup A928 (including a laptop whitelist board enable) http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html - EVGA 122-CK-NF68 Reported by Stephanie Daugherty on IRC http://paste.flashrom.org/view.php?id=1431 - GIGABYTE GA-A75M-UD2H Reported by Soul_keeper on IRC http://paste.flashrom.org/view.php?id=1490 - Intel D945GCNL Add board enable to override laptop detection too. http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html - MSI G33M (MS-7357) http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html - Shuttle FB61 http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html - Tyan S4882 (Thunder K8QS Pro) Reported on IRC NOT OK: Alienware Aurora-R2 http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html Biostar H61MU3 http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html Dell OptiPlex 7010 http://paste.flashrom.org/view.php?id=1481 Intel DH67CL http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html Supermicro X9DRT-HF+ http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html Supermicro X9DRW http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html Tested flash chips: - Atmel AT25FS010 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1484 - Eon EN25F64 to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Spansion S25FL032A/P to PREW (+EW) http://paste.flashrom.org/view.php?id=1510 - ST M29F002T/NT to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - Winbond W25X10 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1486 Tested chipsets: - NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html - SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html Miscellaneous: - Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R). - Force 2-digit hex numbers in prints were it makes sense. - Share code between enable_flash_sis530() and enable_flash_sis540(). - Some SST 25 series chips support both WRSR enable commands... - S25FL032A and S25FL064A share the IDs with their P versions, so rename them. - Fix a few memleaks in serprog. - Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog) - Add (another) hint regarding the mandatory -p parameter to the manpage to make Debian bug #690478 happy. http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478 - Fix whitespace issues. - On shutdown, reset count of registered programmers (by Nico Huber) - Fix atahpt.c shutdown. The order of pcidev_init, register_shutdown and rpci_write_* is important! Thanks to Roy for reporting the problem and testing the fix. Corresponding to flashrom svn r1640. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
112
chipset_enable.c
112
chipset_enable.c
@ -95,19 +95,20 @@ static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
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static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name)
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{
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#define SIS_MAPREG 0x40
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uint8_t new, newer;
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/* Extended BIOS enable = 1, Lower BIOS Enable = 1 */
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/* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */
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new = pci_read_byte(dev, 0x40);
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new = pci_read_byte(dev, SIS_MAPREG);
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new &= (~0x04); /* No idea why we clear bit 2. */
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new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */
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rpci_write_byte(dev, 0x40, new);
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newer = pci_read_byte(dev, 0x40);
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if (newer != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x40, new, name);
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msg_pinfo("Stuck at 0x%x\n", newer);
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rpci_write_byte(dev, SIS_MAPREG, new);
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newer = pci_read_byte(dev, SIS_MAPREG);
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if (newer != new) { /* FIXME: share this with other code? */
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msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
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SIS_MAPREG, new, name);
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msg_pinfo("Stuck at 0x%02x.\n", newer);
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return -1;
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}
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return 0;
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@ -176,8 +177,9 @@ static int enable_flash_sis5511(struct pci_dev *dev, const char *name)
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return ret;
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}
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static int enable_flash_sis530(struct pci_dev *dev, const char *name)
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static int enable_flash_sis5x0(struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask)
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{
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#define SIS_REG 0x45
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uint8_t new, newer;
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int ret = 0;
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struct pci_dev *sbdev;
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@ -188,46 +190,28 @@ static int enable_flash_sis530(struct pci_dev *dev, const char *name)
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ret = enable_flash_sis_mapping(sbdev, name);
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new = pci_read_byte(sbdev, 0x45);
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new &= (~0x20);
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new |= 0x4;
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rpci_write_byte(sbdev, 0x45, new);
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newer = pci_read_byte(sbdev, 0x45);
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if (newer != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x45, new, name);
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msg_pinfo("Stuck at 0x%x\n", newer);
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new = pci_read_byte(sbdev, SIS_REG);
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new &= (~dis_mask);
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new |= en_mask;
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rpci_write_byte(sbdev, SIS_REG, new);
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newer = pci_read_byte(sbdev, SIS_REG);
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if (newer != new) { /* FIXME: share this with other code? */
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msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SIS_REG, new, name);
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msg_pinfo("Stuck at 0x%02x\n", newer);
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ret = -1;
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}
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return ret;
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}
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static int enable_flash_sis530(struct pci_dev *dev, const char *name)
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{
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return enable_flash_sis5x0(dev, name, 0x20, 0x04);
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}
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static int enable_flash_sis540(struct pci_dev *dev, const char *name)
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{
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uint8_t new, newer;
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int ret = 0;
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struct pci_dev *sbdev;
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sbdev = find_southbridge(dev->vendor_id, name);
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if (!sbdev)
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return -1;
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ret = enable_flash_sis_mapping(sbdev, name);
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new = pci_read_byte(sbdev, 0x45);
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new &= (~0x80);
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new |= 0x40;
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rpci_write_byte(sbdev, 0x45, new);
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newer = pci_read_byte(sbdev, 0x45);
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if (newer != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x45, new, name);
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msg_pinfo("Stuck at 0x%x\n", newer);
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ret = -1;
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}
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return ret;
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return enable_flash_sis5x0(dev, name, 0x80, 0x40);
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}
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/* Datasheet:
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@ -268,9 +252,8 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name)
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rpci_write_word(dev, xbcs, new);
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if (pci_read_word(dev, xbcs) != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", xbcs, new, name);
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if (pci_read_word(dev, xbcs) != new) { /* FIXME: share this with other code? */
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msg_pinfo("Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).\n", xbcs, new, name);
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return -1;
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}
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@ -678,8 +661,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
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rpci_write_byte(dev, 0x40, val);
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if (pci_read_byte(dev, 0x40) != val) {
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msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n",
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name);
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msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name);
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return -1;
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}
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@ -851,15 +833,15 @@ static int enable_flash_cs5536(struct pci_dev *dev, const char *name)
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static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
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{
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#define SC_REG 0x52
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uint8_t new;
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rpci_write_byte(dev, 0x52, 0xee);
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rpci_write_byte(dev, SC_REG, 0xee);
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new = pci_read_byte(dev, 0x52);
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new = pci_read_byte(dev, SC_REG);
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if (new != 0xee) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x52, new, name);
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if (new != 0xee) { /* FIXME: share this with other code? */
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msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SC_REG, new, name);
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return -1;
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}
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@ -869,29 +851,31 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
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/* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */
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static int enable_flash_amd8111(struct pci_dev *dev, const char *name)
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{
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#define AMD_MAPREG 0x43
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#define AMD_ENREG 0x40
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uint8_t old, new;
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/* Enable decoding at 0xffb00000 to 0xffffffff. */
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old = pci_read_byte(dev, 0x43);
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old = pci_read_byte(dev, AMD_MAPREG);
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new = old | 0xC0;
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if (new != old) {
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rpci_write_byte(dev, 0x43, new);
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if (pci_read_byte(dev, 0x43) != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x43, new, name);
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rpci_write_byte(dev, AMD_MAPREG, new);
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if (pci_read_byte(dev, AMD_MAPREG) != new) {
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msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
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AMD_MAPREG, new, name);
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}
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}
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/* Enable 'ROM write' bit. */
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old = pci_read_byte(dev, 0x40);
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old = pci_read_byte(dev, AMD_ENREG);
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new = old | 0x01;
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if (new == old)
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return 0;
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rpci_write_byte(dev, 0x40, new);
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rpci_write_byte(dev, AMD_ENREG, new);
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if (pci_read_byte(dev, 0x40) != new) {
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msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
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"(WARNING ONLY).\n", 0x40, new, name);
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if (pci_read_byte(dev, AMD_ENREG) != new) {
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msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
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AMD_ENREG, new, name);
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return -1;
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}
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@ -1055,8 +1039,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
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new = old | 0xC0;
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if (new != old) {
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rpci_write_byte(dev, reg, new);
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if (pci_read_byte(dev, reg) != new) {
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msg_pinfo("Setting register 0x%02x to 0x%x on %s failed.\n", reg, new, name);
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if (pci_read_byte(dev, reg) != new) { /* FIXME: share this with other code? */
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msg_pinfo("Setting register 0x%02x to 0x%02x on %s failed.\n", reg, new, name);
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err++;
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}
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}
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@ -1298,7 +1282,7 @@ const struct penable chipset_enables[] = {
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{0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540},
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{0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540},
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{0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540},
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{0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540},
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{0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540},
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{0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540},
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{0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540},
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{0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540},
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@ -1355,7 +1339,7 @@ const struct penable chipset_enables[] = {
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{0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x},
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{0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x},
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{0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x},
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{0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
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{0x10de, 0x075c, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
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{0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
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{0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x},
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{0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
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