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const'ify flashctx to align signatures with cros flashrom

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The ChromiumOS flashrom fork has since const'ify flashctx
in a few places. This aligns the function signatures to
match with downstream to ease forward porting patches
out of downstream back into mainline flashrom.

This patch is minimum viable alignment and so feedback is
welcome.

Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Edward O'Callaghan
2020-04-12 17:27:53 +10:00
committed by Angel Pons
parent e0272e2b6f
commit e4ddc36371
26 changed files with 53 additions and 53 deletions
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6
spi25_statusreg.c
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@ -22,7 +22,7 @@
#include "spi.h"
/* === Generic functions === */
static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
static int spi_write_status_register_flag(const struct flashctx *flash, int status, const unsigned char enable_opcode)
{
int result;
int i = 0;
@ -73,7 +73,7 @@ static int spi_write_status_register_flag(struct flashctx *flash, int status, co
return 0;
}
int spi_write_status_register(struct flashctx *flash, int status)
int spi_write_status_register(const struct flashctx *flash, int status)
{
int feature_bits = flash->chip->feature_bits;
int ret = 1;
@ -90,7 +90,7 @@ int spi_write_status_register(struct flashctx *flash, int status)
return ret;
}
uint8_t spi_read_status_register(struct flashctx *flash)
uint8_t spi_read_status_register(const struct flashctx *flash)
{
static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
/* FIXME: No workarounds for driver/hardware bugs in generic code. */