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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 07:23:43 +02:00

Mark 3COM "3C905B: Cyclone 10/100/BNC" as fully tested

Also do some random cleanups while I'm at it.

Corresponding to flashrom svn r567.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann 2009-06-02 19:54:22 +00:00
parent bc2bbd2851
commit e9d04d40ce
5 changed files with 11 additions and 11 deletions

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@ -781,15 +781,15 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name) static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
{ {
uint8_t tmp; uint8_t tmp;
pci_write_byte(dev, 0x92, 0); pci_write_byte(dev, 0x92, 0);
tmp = pci_read_byte(dev, 0x6d); tmp = pci_read_byte(dev, 0x6d);
tmp |= 0x01; tmp |= 0x01;
pci_write_byte(dev, 0x6d, tmp); pci_write_byte(dev, 0x6d, tmp);
return 0; return 0;
} }
static int enable_flash_ck804(struct pci_dev *dev, const char *name) static int enable_flash_ck804(struct pci_dev *dev, const char *name)

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@ -346,8 +346,8 @@ extern const struct board_info boards_bad[];
#define EN_29F040A 0x7F04 #define EN_29F040A 0x7F04
#define EN_29LV010 0x7F6E #define EN_29LV010 0x7F6E
#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */ #define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
#define EN_29F002T 0x7F92 #define EN_29F002T 0x7F92 /* Also EN29F002A */
#define EN_29F002B 0x7F97 #define EN_29F002B 0x7F97 /* Also EN29F002AN */
#define FUJITSU_ID 0x04 /* Fujitsu */ #define FUJITSU_ID 0x04 /* Fujitsu */
#define MBM29F400BC 0xAB #define MBM29F400BC 0xAB

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@ -133,7 +133,7 @@ Specify the programmer device. Currently supported are:
.sp .sp
.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)" .BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
.sp .sp
.BR "* it87spi" " (for flash ROMs behind a IT87xx SuperI/O LPC/SPI translation unit)" .BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI translation unit)"
.sp .sp
The dummy programmer has an optional parameter specifying the bus types it The dummy programmer has an optional parameter specifying the bus types it
should support. For that you have to use the should support. For that you have to use the

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@ -46,7 +46,7 @@ struct pcidev_status nics_3com[] = {
{0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, {0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
{0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" }, {0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" },
{0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" }, {0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" },
{0x10b7, 0x9058, PCI_NT, "3COM", "3C905B: Cyclone 10/100/BNC" }, {0x10b7, 0x9058, PCI_OK, "3COM", "3C905B: Cyclone 10/100/BNC" },
/* 3C905C */ /* 3C905C */
{0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" }, {0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" },