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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

Add a bunch of new/tested stuff and various small changes 14

Tested Mainboards:
OK:
 - ASUS M3A78-EH
   http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html
 - ASUS P2B-LS
   http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html
 - Biostar TA790GX A3+
   http://paste.flashrom.org/view.php?id=1350
 - ECS 848P-A7
   http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html
 - GIGABYTE GA-G41MT-S2PT
   Reported on IRC
 - GIGABYTE GA-H77-D3H
   Reported and tested by Alexander Gordeev on IRC.
 - Gigabyte GA-X79-UD5
   http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html
 - Shuttle FN78S
   http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
 - VIA EITX-3000
   Reported on IRC by Tuju

NOT OK:
 - Dell PowerEdge C6220 (0HYFFG)
   http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html
 - Foxconn Q45M
   http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html
 - MSI MS-7309 (K9N6SGM-V)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html
 - Supermicro X9QRi-F+
   http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
 - ZOTAC H61-ITX WiFi (H61ITX-A-E)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html

ASUS CUSL2-C has been tested to be working with the board enable once
implemented for the TUSL2-C board. They seem to have the same PCI IDs
as shown in the links below. Since only the CUSL2-C board enable has been
tested yet, we distinguish the two by DMI strings.
http://paste.flashrom.org/view.php?id=1393
http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml

Tested flash chips:
 - Set EMST F25L008A to PREW (+PREW)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
 - Set GigaDevice GD25Q64 to PREW (+PREW)
   http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea
 - Set Macronix MX25L12805 to P (+P)
   http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
 - Set SST SST49LF003A/B to PREW (+EW)
   http://paste.flashrom.org/view.php?id=467
 - Set Winbond W49V002FA to PREW (+EW)
   http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html

Tested chipsets:
 - Intel X79 (0x1d41)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html

Board enables:
 - add ASUS P4P800-X
   Created by Idwer Vollering and tested by Mingsen Bao:
   http://paste.flashrom.org/view.php?id=467
 - add DMI string to P4P800-VM

Miscellaneous:
 - Add remaining Intel 7 series chipset (LPC) PCI IDs
 - Add generic SPI detection for chips from Winbond
 - Minor manpage changes
 - Minor other cleanups
 - Escape full stops after abbreviations in the manpage.
 - Add ICH9 and successors to spi_get_valid_read_addr

Corresponding to flashrom svn r1601.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner
2012-09-21 12:52:50 +00:00
parent 3c0fcd0f30
commit eb58257b96
12 changed files with 152 additions and 111 deletions

View File

@ -2596,7 +2596,7 @@ const struct flashchip flashchips[] = {
.total_size = 1024,
.page_size = 256,
.feature_bits = FEATURE_WRSR_EITHER,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -3474,7 +3474,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -3509,7 +3509,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -3585,7 +3585,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -3620,7 +3620,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -4014,7 +4014,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -4051,7 +4051,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
.voltage = {2700, 3600},
},
{
@ -4178,7 +4178,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -5032,7 +5032,7 @@ const struct flashchip flashchips[] = {
.total_size = 16384,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PROBE,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -7044,7 +7044,7 @@ const struct flashchip flashchips[] = {
.total_size = 384,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 1, /* 150 ns */
.block_erasers =
@ -8060,29 +8060,29 @@ const struct flashchip flashchips[] = {
.voltage = {2700, 3600},
},
{
.vendor = "ST",
.name = "M29W512B",
{
.vendor = "ST",
.name = "M29W512B",
.bustype = BUS_PARALLEL,
.manufacture_id = ST_ID,
.model_id = ST_M29W512B,
.total_size = 64,
.page_size = 64 * 1024,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
.manufacture_id = ST_ID,
.model_id = ST_M29W512B,
.total_size = 64,
.page_size = 64 * 1024,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
.tested = TEST_OK_PRE,
.probe = probe_jedec,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {64 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
}
},
.write = write_jedec_1,
.read = read_memmapped,
.probe = probe_jedec,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {64 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
}
},
.write = write_jedec_1,
.read = read_memmapped,
.voltage = {2700, 3600},
},
},
{
.vendor = "ST",
@ -9476,7 +9476,7 @@ const struct flashchip flashchips[] = {
.total_size = 256,
.page_size = 128,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
@ -9721,6 +9721,21 @@ const struct flashchip flashchips[] = {
.read = NULL,
},
{
.vendor = "Winbond",
.name = "unknown Winbond (ex Nexcom) SPI chip",
.bustype = BUS_SPI,
.manufacture_id = WINBOND_NEX_ID,
.model_id = GENERIC_DEVICE_ID,
.total_size = 0,
.page_size = 256,
.tested = TEST_BAD_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.write = NULL,
.read = NULL,
},
{
.vendor = "Generic",
.name = "unknown SPI chip (RDID)",