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Add a bunch of new/tested stuff and various small changes 14
Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Corresponding to flashrom svn r1601. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner
23
flashrom.8
23
flashrom.8
@ -291,8 +291,9 @@ contents (using
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.BR \-r )
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and store it to a medium outside of your computer, like
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a USB drive or a network share. If you needed to run the board enable code
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already for probing, use it for reading too. Now you can try to write the
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new image. You should enable the board enable code in any case now, as it
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already for probing, use it for reading too.
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If reading succeeds and the contens of the read file look legit you can try to write the new image.
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You should enable the board enable code in any case now, as it
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has been written because it is known that writing/erasing without the board
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enable is going to fail. In any case (success or failure), please report to
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the flashrom mailing list, see below.
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@ -326,7 +327,7 @@ report so we can diagnose the problem.
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.B Intel chipsets
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.sp
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If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
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attached, and if a valid descriptor was written to it (e.g. by the vendor), the
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attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
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chipset provides an alternative way to access the flash chip(s) named
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.BR "Hardware Sequencing" .
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It is much simpler than the normal access method (called
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@ -341,7 +342,7 @@ syntax where
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.BR auto ", " swseq " or " hwseq .
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By default
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.RB "(or when setting " ich_spi_mode=auto )
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the module tries to use swseq and only activates hwseq if need be (e.g. if
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the module tries to use swseq and only activates hwseq if need be (e.g.\& if
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important opcodes are inaccessible due to lockdown; or if more than one flash
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chip is attached). The other options (swseq, hwseq) select the respective mode
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(if possible).
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@ -482,7 +483,7 @@ the
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.sp
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syntax where
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.B size
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is the number of bytes (min. 1, max. 256).
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is the number of bytes (min.\& 1, max.\& 256).
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.sp
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Example:
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.sp
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@ -498,7 +499,7 @@ flash chip, you can specify a blacklist of SPI commands with the
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syntax where
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.B commandlist
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is a list of two-digit hexadecimal representations of
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SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI
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SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
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controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
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commandlist may be up to 512 characters (256 commands) long.
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Implementation note: flashrom will detect an error during command execution.
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@ -514,7 +515,7 @@ you can specify an ignorelist of SPI commands with the
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syntax where
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.B commandlist
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is a list of two-digit hexadecimal representations of
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SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
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SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
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command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
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characters (256 commands) long.
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Implementation note: flashrom won't detect an error during command execution.
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@ -723,7 +724,7 @@ is installed in your system, you have to specify the PCI address of the card
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you want to use with the
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.B pci=
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parameter as explained in the
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.B nic3com
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.B nic3com et al.\&
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section above.
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.sp
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More information about the hardware is available at
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@ -828,11 +829,11 @@ Many of the developers communicate via the
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IRC channel on
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.BR chat.freenode.net .
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You are welcome to join and ask questions, send us bug and success reports there
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too. Please provide a way to contact you later (e.g. a mail address) and be
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too. Please provide a way to contact you later (e.g.\& a mail address) and be
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patient if there is no immediate reaction. Also, we provide a pastebin service
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at
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.B http://paste.flashrom.org
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that is very useful when you want to share logs etc. without spamming the
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that is very useful when you want to share logs etc.\& without spamming the
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channel.
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.SS
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.B Laptops
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@ -853,7 +854,7 @@ One-time programmable (OTP) memory and unique IDs
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.sp
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Some flash chips contain OTP memory often denoted as "security registers".
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They usually have a capacity in the range of some bytes to a few hundred
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bytes and can be used to give devices unique IDs etc. flashrom is not able
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bytes and can be used to give devices unique IDs etc. flashrom is not able
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to read or write these memories and may therefore not be able to duplicate a
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chip completely. For chip types known to include OTP memories a warning is
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printed when they are detected.
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