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mirror of https://review.coreboot.org/flashrom.git synced 2025-08-16 11:54:41 +02:00

Various ichspi.c refinements

* add a generic preop-opcode-pair table.

* rename ich_check_opcodes to ich_init_opcodes.

* let ich_init_opcodes do not need to access flashchip structure:
  . move the definition of struct preop_opcode_pair to a better place
  . remove preop_opcode_pairs from 'struct flashchip'
  . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure

* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.

* fix a coding style mistake.

Corresponding to flashrom svn r367 and coreboot v2 svn r3814.

Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
FENG yu ning
2008-12-15 02:32:11 +00:00
committed by Peter Stuge
parent 7de8639b29
commit f041e9b586
3 changed files with 32 additions and 35 deletions

View File

@@ -339,6 +339,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
printf("WARNING: SPI Configuration Lockdown activated.\n");
ichspi_lock = 1;
}
ich_init_opcodes();
break;
case BUS_TYPE_ICH9_SPI:
tmp2 = *(uint16_t *) (spibar + 0);