mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-02 22:43:17 +02:00
Add support for Adesto AT25SF128A
The following adds support for the Adesto AT25SF128A-SHB-T part. We have varied the correct chip name is reported as well as write and read 16MBytes of random data and verified the checksum's match. Further, --wp-list appears to report the correct ranges. BUG=None BRANCH=none TEST=Ran flashrom with a Dediprog SF100, RW random data and checksum matched. Original-Change-Id: Ic22ca588f33753fdf492e8445324bcc0a809d3e2 Original-Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/1593201 Original-Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Original-Tested-by: Martin Roth <martinroth@chromium.org> Original-Reviewed-by: Martin Roth <martinroth@chromium.org> (cherry picked from commit 1fa87e058b72a2de1e9127a45e9978361de48479) Note: this does not include the changes made to writeprotect.c in the original patch, as they depend on a large amount of additional writeprotect code that is currently only present in the cros tree, and the intention here is just to reduce the diff in flashchips.c. The `.wp` field has also been removed. Change-Id: I1ce2a6699a1f0116306f668123673a1ba9c932d2 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
@ -152,6 +152,7 @@
|
||||
#define ATMEL_AT25SF161 0x8601
|
||||
#define ATMEL_AT25SF321 0x8701
|
||||
#define ATMEL_AT25SL128A 0x4218
|
||||
#define ATMEL_AT25SF128A 0x8901 /* Adesto AT25SF128A */
|
||||
#define ATMEL_AT26DF041 0x4400
|
||||
#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
|
||||
#define ATMEL_AT26DF081A 0x4501
|
||||
|
Reference in New Issue
Block a user