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spi25: Integrate 4BA support

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Allow 4-byte addresses for instructions usually used with 3-byte
addresses. Decide in which way the 4th byte will be communicated
based on the state of the chip (i.e. have we enabled 4BA mode)
and a new feature bit for an extended address register. If we
are not in 4BA mode and no extended address register is available
or the write to it fails, bail out.

We cache the state of 4BA mode and the extended address register
in the flashctx.

Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22384
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
2017-10-14 17:47:28 +02:00
parent 0ecbacbfca
commit f43c654ad0
5 changed files with 57 additions and 9 deletions
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33
spi25.c
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@ -363,14 +363,37 @@ static int spi_simple_write_cmd(struct flashctx *const flash, const uint8_t op,
return result ? result : status;
}
static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high)
{
if (flash->address_high_byte != addr_high &&
spi_write_extended_address_register(flash, addr_high))
return -1;
flash->address_high_byte = addr_high;
return 0;
}
static int spi_prepare_address(struct flashctx *const flash,
uint8_t cmd_buf[], const unsigned int addr)
{
/* TODO: extend for 4BA */
cmd_buf[1] = (addr >> 16) & 0xff;
cmd_buf[2] = (addr >> 8) & 0xff;
cmd_buf[3] = (addr >> 0) & 0xff;
return 3;
if (flash->in_4ba_mode) {
cmd_buf[1] = (addr >> 24) & 0xff;
cmd_buf[2] = (addr >> 16) & 0xff;
cmd_buf[3] = (addr >> 8) & 0xff;
cmd_buf[4] = (addr >> 0) & 0xff;
return 4;
} else {
if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR) {
if (spi_set_extended_address(flash, addr >> 24))
return -1;
} else {
if (addr >> 24)
return -1;
}
cmd_buf[1] = (addr >> 16) & 0xff;
cmd_buf[2] = (addr >> 8) & 0xff;
cmd_buf[3] = (addr >> 0) & 0xff;
return 3;
}
}
/**