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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00

Add a reset to probe_jedec before we read the chip's IDs

Previous probes might have had too short delays for entering ID mode,
so the chip may still be in the process of entering the ID mode. Due to
that, an additional delay before the reset makes sense.
Add FEATURE_RESET_MASK to deal cleanly with those feature bits.

Maciej Pijanka tested the patch and it fixes probing for him with some
old Atmel chips.

Corresponding to flashrom svn r1216.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Anders Juel Jensen <andersjjensen@gmail.com>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This commit is contained in:
Sean Nelson 2010-10-20 21:13:19 +00:00 committed by Carl-Daniel Hailfinger
parent 42d38a9dd1
commit f59e2637d1
2 changed files with 22 additions and 1 deletions

View File

@ -83,6 +83,7 @@ enum chipbustype {
#define FEATURE_LONG_RESET (0 << 4) #define FEATURE_LONG_RESET (0 << 4)
#define FEATURE_SHORT_RESET (1 << 4) #define FEATURE_SHORT_RESET (1 << 4)
#define FEATURE_EITHER_RESET FEATURE_LONG_RESET #define FEATURE_EITHER_RESET FEATURE_LONG_RESET
#define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET)
#define FEATURE_ADDR_FULL (0 << 2) #define FEATURE_ADDR_FULL (0 << 2)
#define FEATURE_ADDR_MASK (3 << 2) #define FEATURE_ADDR_MASK (3 << 2)
#define FEATURE_ADDR_2AA (1 << 2) #define FEATURE_ADDR_2AA (1 << 2)

22
jedec.c
View File

@ -142,6 +142,26 @@ static int probe_jedec_common(struct flashchip *flash, unsigned int mask)
return 0; return 0;
} }
/* Earlier probes might have been too fast for the chip to enter ID
* mode completely. Allow the chip to finish this before seeing a
* reset command.
*/
if (probe_timing_enter)
programmer_delay(probe_timing_enter);
/* Reset chip to a clean slate */
if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
{
chip_writeb(0xAA, bios + (0x5555 & mask));
if (probe_timing_exit)
programmer_delay(10);
chip_writeb(0x55, bios + (0x2AAA & mask));
if (probe_timing_exit)
programmer_delay(10);
}
chip_writeb(0xF0, bios + (0x5555 & mask));
if (probe_timing_exit)
programmer_delay(probe_timing_exit);
/* Issue JEDEC Product ID Entry command */ /* Issue JEDEC Product ID Entry command */
chip_writeb(0xAA, bios + (0x5555 & mask)); chip_writeb(0xAA, bios + (0x5555 & mask));
if (probe_timing_enter) if (probe_timing_enter)
@ -172,7 +192,7 @@ static int probe_jedec_common(struct flashchip *flash, unsigned int mask)
} }
/* Issue JEDEC Product ID Exit command */ /* Issue JEDEC Product ID Exit command */
if ((flash->feature_bits & FEATURE_SHORT_RESET) == FEATURE_LONG_RESET) if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
{ {
chip_writeb(0xAA, bios + (0x5555 & mask)); chip_writeb(0xAA, bios + (0x5555 & mask));
if (probe_timing_exit) if (probe_timing_exit)