mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 23:22:37 +02:00
Add detailed status register printing and unlocking for all ATMEL AT25* chips
Add support for Atmel AT25DF081A and AT25DQ161. Some chips require EWSR before WRSR, others require WREN before WRSR, and some support both variants. Add feature_bits to select the correct SPI command, and default to EWSR. Corresponding to flashrom svn r1115. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Steven Rosario Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
parent
f792c7d4cb
commit
fd7075ae75
@ -47,7 +47,17 @@ int spi_chip_write_1_new(struct flashchip *flash, uint8_t *buf, int start, int l
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int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len);
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int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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uint8_t spi_read_status_register(void);
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int spi_prettyprint_status_register_at25df(struct flashchip *flash);
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int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
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int spi_prettyprint_status_register_at25f(struct flashchip *flash);
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int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
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int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
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int spi_disable_blockprotect(struct flashchip *flash);
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int spi_disable_blockprotect_at25df(struct flashchip *flash);
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int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
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int spi_disable_blockprotect_at25f(struct flashchip *flash);
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int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
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int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
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int spi_byte_program(int addr, uint8_t databyte);
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int spi_nbyte_program(int addr, uint8_t *bytes, int len);
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int spi_nbyte_read(int addr, uint8_t *bytes, int len);
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6
flash.h
6
flash.h
@ -69,8 +69,9 @@ enum chipbustype {
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/*
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* How many different erase functions do we have per chip?
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* Atmel AT25FS010 has 6 different functions.
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*/
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#define NUM_ERASEFUNCTIONS 5
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#define NUM_ERASEFUNCTIONS 6
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#define FEATURE_REGISTERMAP (1 << 0)
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#define FEATURE_BYTEWRITES (1 << 1)
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@ -82,6 +83,9 @@ enum chipbustype {
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#define FEATURE_ADDR_2AA (1 << 2)
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#define FEATURE_ADDR_AAA (2 << 2)
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#define FEATURE_ADDR_SHIFTED (1 << 5)
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#define FEATURE_WRSR_EWSR (1 << 6)
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#define FEATURE_WRSR_WREN (1 << 7)
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#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
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struct flashchip {
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const char *vendor;
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115
flashchips.c
115
flashchips.c
@ -789,6 +789,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF021,
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.total_size = 256,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -811,7 +812,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df,
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.unlock = spi_disable_blockprotect_at25df,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -824,6 +826,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF041A,
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.total_size = 512,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -846,7 +849,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df,
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.unlock = spi_disable_blockprotect_at25df,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -859,6 +863,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF081,
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.total_size = 1024,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -881,7 +886,45 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df,
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.unlock = spi_disable_blockprotect_at25df,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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{
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.vendor = "Atmel",
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.name = "AT25DF081A",
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.bustype = CHIP_BUSTYPE_SPI,
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.manufacture_id = ATMEL_ID,
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.model_id = AT_25DF081A,
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.total_size = 1024,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 256} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {32 * 1024, 32} },
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {1024 * 1024, 1} },
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.block_erase = spi_block_erase_60,
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}, {
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.eraseblocks = { {1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_at25df_sec,
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.unlock = spi_disable_blockprotect_at25df_sec,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -894,6 +937,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF161,
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.total_size = 2048,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -916,7 +960,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df_sec,
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.unlock = spi_disable_blockprotect_at25df_sec,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -929,6 +974,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF321,
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.total_size = 4096,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_OK_PRW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -951,7 +997,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df,
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.unlock = spi_disable_blockprotect_at25df,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -964,6 +1011,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF321A,
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.total_size = 4096,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -986,7 +1034,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df_sec,
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.unlock = spi_disable_blockprotect_at25df_sec,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -999,6 +1048,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25DF641,
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.total_size = 8192,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -1021,7 +1071,45 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25df_sec,
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.unlock = spi_disable_blockprotect_at25df_sec,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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{
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.vendor = "Atmel",
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.name = "AT25DQ161",
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.bustype = CHIP_BUSTYPE_SPI,
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.manufacture_id = ATMEL_ID,
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.model_id = AT_25DQ161,
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.total_size = 2048,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 512} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {32 * 1024, 64} },
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {64 * 1024, 32} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {2 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_60,
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}, {
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.eraseblocks = { {2 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_at25df_sec,
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.unlock = spi_disable_blockprotect_at25df_sec,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -1034,6 +1122,7 @@ struct flashchip flashchips[] = {
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.model_id = AT_25F512B,
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.total_size = 64,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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@ -1056,7 +1145,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25f,
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.unlock = spi_disable_blockprotect_at25f,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -1077,6 +1167,9 @@ struct flashchip flashchips[] = {
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{
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.eraseblocks = { {4 * 1024, 32} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {4 * 1024, 32} },
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.block_erase = spi_block_erase_d7,
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}, {
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.eraseblocks = { {32 * 1024, 4} },
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.block_erase = spi_block_erase_52,
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@ -1091,7 +1184,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25fs010,
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.unlock = spi_disable_blockprotect_at25fs010,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -1126,7 +1220,8 @@ struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.printlock = spi_prettyprint_status_register_at25fs040,
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.unlock = spi_disable_blockprotect_at25fs040,
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.write = spi_chip_write_256,
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.read = spi_chip_read,
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},
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@ -110,12 +110,19 @@
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#define AT_25DF021 0x4300
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#define AT_25DF041A 0x4401
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#define AT_25DF081 0x4502
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#define AT_25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
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#define AT_25DF161 0x4602
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#define AT_25DF321 0x4700 /* Same as 26DF321 */
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#define AT_25DF321A 0x4701
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#define AT_25DF641 0x4800
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#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
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#define AT_25DQ161 0x8600
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#define AT25F512 /* No device ID found in datasheet. Vendor ID
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* can be read with AT25F512A_RDID */
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#define AT_25F512A 0x65 /* Needs AT25F512A_RDID */
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#define AT_25F512B 0x6500
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#define AT25F1024 /* No device ID found in datasheet. Vendor ID
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* can be read with AT25F512A_RDID */
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#define AT_25F1024A 0x60 /* Needs AT25F512A_RDID */
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#define AT_25FS010 0x6601
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#define AT_25FS040 0x6604
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#define AT_26DF041 0x4400
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2
spi.c
2
spi.c
@ -30,8 +30,6 @@
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enum spi_controller spi_controller = SPI_CONTROLLER_NONE;
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void spi_prettyprint_status_register(struct flashchip *flash);
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const struct spi_programmer spi_programmer[] = {
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{ /* SPI_CONTROLLER_NONE */
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.command = NULL,
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3
spi.h
3
spi.h
@ -31,7 +31,7 @@
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#define JEDEC_RDID_INSIZE 0x03
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/* AT25F512A has bit 3 as don't care bit in commands */
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#define AT25F512A_RDID 0x15
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#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */
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#define AT25F512A_RDID_OUTSIZE 0x01
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#define AT25F512A_RDID_INSIZE 0x02
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@ -123,5 +123,6 @@
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#define SPI_INVALID_OPCODE -2
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#define SPI_INVALID_ADDRESS -3
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#define SPI_INVALID_LENGTH -4
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#define SPI_FLASHROM_BUG -5
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#endif /* !__SPI_H__ */
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318
spi25.c
318
spi25.c
@ -312,7 +312,16 @@ uint8_t spi_read_status_register(void)
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}
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/* Prettyprint the status register. Common definitions. */
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void spi_prettyprint_status_register_common(uint8_t status)
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static void spi_prettyprint_status_register_welwip(uint8_t status)
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{
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msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
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"%sset\n", (status & (1 << 1)) ? "" : "not ");
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msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is "
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"%sset\n", (status & (1 << 0)) ? "" : "not ");
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}
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/* Prettyprint the status register. Common definitions. */
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static void spi_prettyprint_status_register_common(uint8_t status)
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{
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msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
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"%sset\n", (status & (1 << 5)) ? "" : "not ");
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@ -322,10 +331,7 @@ void spi_prettyprint_status_register_common(uint8_t status)
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"%sset\n", (status & (1 << 3)) ? "" : "not ");
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msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
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"%sset\n", (status & (1 << 2)) ? "" : "not ");
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msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
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"%sset\n", (status & (1 << 1)) ? "" : "not ");
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msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is "
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"%sset\n", (status & (1 << 0)) ? "" : "not ");
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spi_prettyprint_status_register_welwip(status);
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}
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/* Prettyprint the status register. Works for
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@ -338,6 +344,121 @@ void spi_prettyprint_status_register_amic_a25l(uint8_t status)
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spi_prettyprint_status_register_common(status);
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}
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/* Prettyprint the status register. Common definitions. */
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static void spi_prettyprint_status_register_at25_srplepewpp(uint8_t status)
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{
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msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
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"is %sset\n", (status & (1 << 7)) ? "" : "not ");
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msg_cdbg("Chip status register: Bit 6 "
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"is %sset\n", (status & (1 << 6)) ? "" : "not ");
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msg_cdbg("Chip status register: Erase/Program Error (EPE) "
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"is %sset\n", (status & (1 << 5)) ? "" : "not ");
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msg_cdbg("Chip status register: WP# pin (WPP) "
|
||||
"is %sactive\n", (status & (1 << 4)) ? "not " : "");
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_at25df(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
|
||||
status = spi_read_status_register();
|
||||
msg_cdbg("Chip status register is %02x\n", status);
|
||||
|
||||
spi_prettyprint_status_register_at25_srplepewpp(status);
|
||||
msg_cdbg("Chip status register: Software Protection Status (SWP): ");
|
||||
switch (status & (3 << 2)) {
|
||||
case 0x0 << 2:
|
||||
msg_cdbg("no sectors are protected\n");
|
||||
break;
|
||||
case 0x1 << 2:
|
||||
msg_cdbg("some sectors are protected\n");
|
||||
/* FIXME: Read individual Sector Protection Registers. */
|
||||
break;
|
||||
case 0x3 << 2:
|
||||
msg_cdbg("all sectors are protected\n");
|
||||
break;
|
||||
default:
|
||||
msg_cdbg("reserved for future use\n");
|
||||
break;
|
||||
}
|
||||
spi_prettyprint_status_register_welwip(status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
|
||||
{
|
||||
/* FIXME: We should check the security lockdown. */
|
||||
msg_cdbg("Ignoring security lockdown (if present)\n");
|
||||
msg_cdbg("Ignoring status register byte 2\n");
|
||||
return spi_prettyprint_status_register_at25df(flash);
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_at25f(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
|
||||
status = spi_read_status_register();
|
||||
msg_cdbg("Chip status register is %02x\n", status);
|
||||
|
||||
spi_prettyprint_status_register_at25_srplepewpp(status);
|
||||
msg_cdbg("Chip status register: Bit 3 "
|
||||
"is %sset\n", (status & (1 << 3)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
|
||||
"%sset, %s sectors are protected\n",
|
||||
(status & (1 << 2)) ? "" : "not ",
|
||||
(status & (1 << 2)) ? "all" : "no");
|
||||
spi_prettyprint_status_register_welwip(status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
|
||||
status = spi_read_status_register();
|
||||
msg_cdbg("Chip status register is %02x\n", status);
|
||||
|
||||
msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
|
||||
"is %sset\n", (status & (1 << 7)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
|
||||
"%sset\n", (status & (1 << 6)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
|
||||
"%sset\n", (status & (1 << 5)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 4 is "
|
||||
"%sset\n", (status & (1 << 4)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
|
||||
"%sset\n", (status & (1 << 3)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
|
||||
"%sset\n", (status & (1 << 2)) ? "" : "not ");
|
||||
/* FIXME: Pretty-print detailed sector protection status. */
|
||||
spi_prettyprint_status_register_welwip(status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
|
||||
status = spi_read_status_register();
|
||||
msg_cdbg("Chip status register is %02x\n", status);
|
||||
|
||||
msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
|
||||
"is %sset\n", (status & (1 << 7)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
|
||||
"%sset\n", (status & (1 << 6)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
|
||||
"%sset\n", (status & (1 << 5)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
|
||||
"%sset\n", (status & (1 << 4)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
|
||||
"%sset\n", (status & (1 << 3)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
|
||||
"%sset\n", (status & (1 << 2)) ? "" : "not ");
|
||||
/* FIXME: Pretty-print detailed sector protection status. */
|
||||
spi_prettyprint_status_register_welwip(status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Prettyprint the status register. Works for
|
||||
* ST M25P series
|
||||
* MX MX25L series
|
||||
@ -732,12 +853,12 @@ int spi_write_status_enable(void)
|
||||
* This is according the SST25VF016 datasheet, who knows it is more
|
||||
* generic that this...
|
||||
*/
|
||||
int spi_write_status_register(int status)
|
||||
static int spi_write_status_register_ewsr(struct flashchip *flash, int status)
|
||||
{
|
||||
int result;
|
||||
struct spi_command cmds[] = {
|
||||
{
|
||||
/* FIXME: WRSR requires either EWSR or WREN depending on chip type. */
|
||||
/* WRSR requires either EWSR or WREN depending on chip type. */
|
||||
.writecnt = JEDEC_EWSR_OUTSIZE,
|
||||
.writearr = (const unsigned char[]){ JEDEC_EWSR },
|
||||
.readcnt = 0,
|
||||
@ -759,9 +880,59 @@ int spi_write_status_register(int status)
|
||||
msg_cerr("%s failed during command execution\n",
|
||||
__func__);
|
||||
}
|
||||
/* WRSR performs a self-timed erase before the changes take effect. */
|
||||
programmer_delay(100 * 1000);
|
||||
return result;
|
||||
}
|
||||
|
||||
static int spi_write_status_register_wren(struct flashchip *flash, int status)
|
||||
{
|
||||
int result;
|
||||
struct spi_command cmds[] = {
|
||||
{
|
||||
/* WRSR requires either EWSR or WREN depending on chip type. */
|
||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}, {
|
||||
.writecnt = JEDEC_WRSR_OUTSIZE,
|
||||
.writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}, {
|
||||
.writecnt = 0,
|
||||
.writearr = NULL,
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}};
|
||||
|
||||
result = spi_send_multicommand(cmds);
|
||||
if (result) {
|
||||
msg_cerr("%s failed during command execution\n",
|
||||
__func__);
|
||||
}
|
||||
/* WRSR performs a self-timed erase before the changes take effect. */
|
||||
programmer_delay(100 * 1000);
|
||||
return result;
|
||||
}
|
||||
|
||||
static int spi_write_status_register(struct flashchip *flash, int status)
|
||||
{
|
||||
int ret = 1;
|
||||
|
||||
if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
|
||||
msg_cdbg("Missing status register write definition, assuming "
|
||||
"EWSR is needed\n");
|
||||
flash->feature_bits |= FEATURE_WRSR_EWSR;
|
||||
}
|
||||
if (flash->feature_bits & FEATURE_WRSR_WREN)
|
||||
ret = spi_write_status_register_wren(flash, status);
|
||||
if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR))
|
||||
ret = spi_write_status_register_ewsr(flash, status);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int spi_byte_program(int addr, uint8_t databyte)
|
||||
{
|
||||
int result;
|
||||
@ -844,16 +1015,22 @@ int spi_nbyte_program(int addr, uint8_t *bytes, int len)
|
||||
return result;
|
||||
}
|
||||
|
||||
/* A generic brute-force block protection disable works like this:
|
||||
* Write 0x00 to the status register. Check if any locks are still set (that
|
||||
* part is chip specific). Repeat once.
|
||||
*/
|
||||
int spi_disable_blockprotect(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
int result;
|
||||
|
||||
status = spi_read_status_register();
|
||||
/* If there is block protection in effect, unprotect it first. */
|
||||
if ((status & 0x3c) != 0) {
|
||||
/* If block protection is disabled, stop here. */
|
||||
if ((status & 0x3c) == 0)
|
||||
return 0;
|
||||
|
||||
msg_cdbg("Some block protection in effect, disabling\n");
|
||||
result = spi_write_status_register(status & ~0x3c);
|
||||
result = spi_write_status_register(flash, status & ~0x3c);
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
@ -863,6 +1040,127 @@ int spi_disable_blockprotect(struct flashchip *flash)
|
||||
msg_cerr("Block protection could not be disabled!\n");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int spi_disable_blockprotect_at25df(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
int result;
|
||||
|
||||
status = spi_read_status_register();
|
||||
/* If block protection is disabled, stop here. */
|
||||
if ((status & (3 << 2)) == 0)
|
||||
return 0;
|
||||
|
||||
msg_cdbg("Some block protection in effect, disabling\n");
|
||||
if (status & (1 << 7)) {
|
||||
msg_cdbg("Need to disable Sector Protection Register Lock\n");
|
||||
if ((status & (1 << 4)) == 0) {
|
||||
msg_cerr("WP# pin is active, disabling "
|
||||
"write protection is impossible.\n");
|
||||
return 1;
|
||||
}
|
||||
/* All bits except bit 7 (SPRL) are readonly. */
|
||||
result = spi_write_status_register(flash, status & ~(1 << 7));
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
|
||||
}
|
||||
/* Global unprotect. Make sure to mask SPRL as well. */
|
||||
result = spi_write_status_register(flash, status & ~0xbc);
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
status = spi_read_status_register();
|
||||
if ((status & (3 << 2)) != 0) {
|
||||
msg_cerr("Block protection could not be disabled!\n");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
|
||||
{
|
||||
/* FIXME: We should check the security lockdown. */
|
||||
msg_cinfo("Ignoring security lockdown (if present)\n");
|
||||
return spi_disable_blockprotect_at25df(flash);
|
||||
}
|
||||
|
||||
int spi_disable_blockprotect_at25f(struct flashchip *flash)
|
||||
{
|
||||
/* spi_disable_blockprotect_at25df is not really the right way to do
|
||||
* this, but the side effects of said function work here as well.
|
||||
*/
|
||||
return spi_disable_blockprotect_at25df(flash);
|
||||
}
|
||||
|
||||
int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
int result;
|
||||
|
||||
status = spi_read_status_register();
|
||||
/* If block protection is disabled, stop here. */
|
||||
if ((status & 0x6c) == 0)
|
||||
return 0;
|
||||
|
||||
msg_cdbg("Some block protection in effect, disabling\n");
|
||||
if (status & (1 << 7)) {
|
||||
msg_cdbg("Need to disable Status Register Write Protect\n");
|
||||
/* Clear bit 7 (WPEN). */
|
||||
result = spi_write_status_register(flash, status & ~(1 << 7));
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
}
|
||||
/* Global unprotect. Make sure to mask WPEN as well. */
|
||||
result = spi_write_status_register(flash, status & ~0xec);
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
status = spi_read_status_register();
|
||||
if ((status & 0x6c) != 0) {
|
||||
msg_cerr("Block protection could not be disabled!\n");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
|
||||
{
|
||||
uint8_t status;
|
||||
int result;
|
||||
|
||||
status = spi_read_status_register();
|
||||
/* If block protection is disabled, stop here. */
|
||||
if ((status & 0x7c) == 0)
|
||||
return 0;
|
||||
|
||||
msg_cdbg("Some block protection in effect, disabling\n");
|
||||
if (status & (1 << 7)) {
|
||||
msg_cdbg("Need to disable Status Register Write Protect\n");
|
||||
/* Clear bit 7 (WPEN). */
|
||||
result = spi_write_status_register(flash, status & ~(1 << 7));
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
}
|
||||
/* Global unprotect. Make sure to mask WPEN as well. */
|
||||
result = spi_write_status_register(flash, status & ~0xfc);
|
||||
if (result) {
|
||||
msg_cerr("spi_write_status_register failed\n");
|
||||
return result;
|
||||
}
|
||||
status = spi_read_status_register();
|
||||
if ((status & 0x7c) != 0) {
|
||||
msg_cerr("Block protection could not be disabled!\n");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user