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SST25VF040B using 0x90 identification and AAI write
SST AAI is Auto Address Increment writing, a streamed write to the flash chip where the first write command sets a starting address and following commands simply append data. Unfortunately not supported by Winbond SPI masters. From July 2008. Corresponding to flashrom svn r407 and coreboot v2 svn r3913. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
1
flash.h
1
flash.h
@ -523,6 +523,7 @@ uint8_t spi_read_status_register();
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int spi_disable_blockprotect(void);
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int spi_disable_blockprotect(void);
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void spi_byte_program(int address, uint8_t byte);
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void spi_byte_program(int address, uint8_t byte);
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int spi_nbyte_read(int address, uint8_t *bytes, int len);
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int spi_nbyte_read(int address, uint8_t *bytes, int len);
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int spi_aai_write(struct flashchip *flash, uint8_t *buf);
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/* 82802ab.c */
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/* 82802ab.c */
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int probe_82802ab(struct flashchip *flash);
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int probe_82802ab(struct flashchip *flash);
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14
flashchips.c
14
flashchips.c
@ -1126,6 +1126,20 @@ struct flashchip flashchips[] = {
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.read = spi_chip_read,
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.read = spi_chip_read,
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},
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},
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{
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.vendor = "SST",
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.name = "SST25VF040B.REMS",
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.manufacture_id = 0xbf,
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.model_id = 0x8d,
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.total_size = 512,
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.page_size = 64*1024,
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.tested = TEST_OK_PR,
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.probe = probe_spi_rems,
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.erase = spi_chip_erase_c7,
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.write = spi_chip_aai_write,
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.read = spi_chip_read,
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},
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{
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{
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.vendor = "SST",
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.vendor = "SST",
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.name = "SST25VF080B",
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.name = "SST25VF080B",
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26
spi.c
26
spi.c
@ -615,3 +615,29 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf)
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return 1;
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return 1;
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}
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}
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int spi_aai_write(struct flashchip *flash, uint8_t *buf) {
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uint32_t pos = 2, size = flash->total_size * 1024;
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unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]};
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switch (flashbus) {
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case BUS_TYPE_WBSIO_SPI:
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fprintf(stderr, "%s: impossible with Winbond SPI masters, degrading to byte program\n", __func__);
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return spi_chip_write(flash, buf);
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default:
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break;
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}
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flash->erase(flash);
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spi_write_enable();
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spi_command(6, 0, w, NULL);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(5); /* SST25VF040B Tbp is max 10us */
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while (pos < size) {
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w[1] = buf[pos++];
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w[2] = buf[pos++];
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spi_command(3, 0, w, NULL);
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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myusec_delay(5); /* SST25VF040B Tbp is max 10us */
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}
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spi_write_disable();
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return 0;
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}
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